From d58a354198d4a62b7e41de9f5c2b26765d4fea7e Mon Sep 17 00:00:00 2001
From: nakasima <nakasima@b871894f-2f95-9b40-918c-086798483c85>
Date: Fri, 12 Dec 2008 08:43:31 +0000
Subject: [PATCH] =?UTF-8?q?=E3=82=BF=E3=82=A4=E3=83=9E=E3=83=BC=E3=83=AC?=
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git-svn-id: file:///Volumes/Transfer/gigaleak_20231201/2020-09-30%20-%20paladin.7z/paladin/ctr_firmware@104 b871894f-2f95-9b40-918c-086798483c85
---
 .../build/libraries/os/ARM11/os_timer.c       |  6 ++-
 trunk/bootrom/include/brom/os/ARM11/timer.h   | 10 ++--
 trunk/include/ctr/hw/ARM11/arm11_reg.h        | 49 -------------------
 3 files changed, 9 insertions(+), 56 deletions(-)

diff --git a/trunk/bootrom/build/libraries/os/ARM11/os_timer.c b/trunk/bootrom/build/libraries/os/ARM11/os_timer.c
index 7256ee9..09f99bf 100644
--- a/trunk/bootrom/build/libraries/os/ARM11/os_timer.c
+++ b/trunk/bootrom/build/libraries/os/ARM11/os_timer.c
@@ -289,7 +289,8 @@ ASM BOOL osEnableTimerAndWatchdog( void )
     // 引数 r0 は osDisableInterrupts の返り値
     bl      __cpp(osRestoreInterrupts)
 
-    and     r0, r4, #HW_CPUTM_ENABLE    // retuen value
+    mov     r0, r4
+//    and     r0, r4, #HW_CPUTM_ENABLE    // retuen value
     ldmfd   sp!, {r4, pc}   // stack requires 8byte alignment
 }
 
@@ -317,7 +318,8 @@ ASM BOOL osDisableTimerAndWatchdog( void )
     // 引数 r0 は osDisableInterrupts の返り値
     bl      __cpp(osRestoreInterrupts)
 
-    and     r0, r4, #HW_CPUTM_ENABLE    // retuen value
+    mov     r0, r4
+//    and     r0, r4, #HW_CPUTM_ENABLE    // retuen value
     ldmfd   sp!, {r4, pc}   // stack requires 8byte alignment
 }
 
diff --git a/trunk/bootrom/include/brom/os/ARM11/timer.h b/trunk/bootrom/include/brom/os/ARM11/timer.h
index c00957a..d3141bf 100644
--- a/trunk/bootrom/include/brom/os/ARM11/timer.h
+++ b/trunk/bootrom/include/brom/os/ARM11/timer.h
@@ -38,21 +38,21 @@ OSTimerID;
 
 typedef enum
 {
-    OS_WD_WATCHDOG_MODE = HW_CPUWD_WATCHDOG_MODE,
-    OS_WD_TIMER_MODE = HW_CPUWD_TIMER_MODE
+    OS_WD_WATCHDOG_MODE = REG_OS_WD_CNT_M_MASK,
+    OS_WD_TIMER_MODE = 0
 }
 OSWatchdogMode;
 
 typedef enum
 {
-    OS_TM_AUTO_RELOAD = HW_CPUTM_AUTO_RELOAD,
-    OS_TM_SINGLE_SHOT = HW_CPUTM_SINGLE_SHOT
+    OS_TM_AUTO_RELOAD = REG_OS_TM_CNT_RLD_MASK,
+    OS_TM_SINGLE_SHOT = 0
 }
 OSTimerRepeat;
 
 typedef enum
 {
-    OS_TM_INTR_REQ_ENABLE = HW_CPUTM_INTR_ENABLE,
+    OS_TM_INTR_REQ_ENABLE = REG_OS_TM_CNT_IT_MASK,
     OS_TM_INTR_REQ_DISABLE = 0
 }
 OSTimerIntrReq;
diff --git a/trunk/include/ctr/hw/ARM11/arm11_reg.h b/trunk/include/ctr/hw/ARM11/arm11_reg.h
index 5b9cdc0..ad74d71 100644
--- a/trunk/include/ctr/hw/ARM11/arm11_reg.h
+++ b/trunk/include/ctr/hw/ARM11/arm11_reg.h
@@ -515,55 +515,6 @@ extern "C" {
 #define HW_C15_RGT_L1L2C_WB_WA      0x07    // L1C and L2C Write-Back, Allocate on Write
 
 
-//----------------------------------------------------------------------
-//                  Timer and Watchdog
-//----------------------------------------------------------------------
-
-// Timer
-
-// Timer Control Register
-
-#define HW_CPUTM_ENABLE             0x00000001  // Global timer enable
-#define HW_CPUTM_DISABLE            0x00000000
-#define HW_CPUTM_AUTO_RELOAD        0x00000002  // Auto-reload mode
-#define HW_CPUTM_SINGLE_SHOT        0x00000000  // Single shot mode
-#define HW_CPUTM_INTR_ENABLE        0x00000004  // Interrupt ID 29 enable
-#define HW_CPUTM_PRESCALER_MASK     0x0000ff00  // Interval = (PRESCALER_value+1) x (Load_value+1) / CPU_clock
-
-#define HW_CPUTM_PRESCALER_SFT      8
-
-
-// Timer Interrupt Status Register
-
-#define HW_CPUTM_EVT_FLAG           0x00000001  // Timer Event occured
-
-
-// Watchdog
-
-// Watchdog Control Register
-
-#define HW_CPUWD_ENABLE             0x00000001  // Global watchdog enable
-#define HW_CPUWD_DISABLE            0x00000000
-#define HW_CPUWD_AUTO_RELOAD        0x00000002  // Auto-reload mode
-#define HW_CPUWD_SINGLE_SHOT        0x00000000  // Single shot mode
-#define HW_CPUWD_INTR_ENABLE        0x00000004  // Interrupt ID 30 enable
-#define HW_CPUWD_WATCHDOG_MODE      0x00000008  // Watchdog mode (default)
-#define HW_CPUWD_TIMER_MODE         0x00000000  // Timer mode
-#define HW_CPUWD_PRESCALER_MASK     0x0000ff00  // Interval = (PRESCALER_value+1) x (Load_value+1) / CPU_clock
-
-#define HW_CPUWD_PRESCALER_SFT      8
-
-
-// Watchdog Interrupt Status Register
-
-#define HW_CPUWD_EVT_FLAG           0x00000001  // Watchdog Event occured
-
-
-// Watchdog Reset Status Register
-
-#define HW_CPUWD_RESET              0x00000001  // Watchdog reset
-
-
 #ifdef __cplusplus
 } // extern "C"
 #endif