rvtr/ctr_firmware
1
Fork 0
mirror of https://github.com/rvtr/ctr_firmware.git synced 2025-10-31 07:51:08 -04:00
Code Issues Actions Packages Projects Releases Wiki Activity

NE1EMU追加。

Browse Source 
git-svn-id: file:///Volumes/Transfer/gigaleak_20231201/2020-09-30%20-%20paladin.7z/paladin/ctr_firmware@146 b871894f-2f95-9b40-918c-086798483c85
This commit is contained in:
nakasima 2008-12-26 09:52:48 +00:00
parent b84675780d
commit c8741cd761
6 changed files with 28 additions and 16 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
trunk/bootrom/build/bootrom/teg-dev/ARM9/Makefile
View File

@ -1,6 +1,6 @@
#! make -f
#----------------------------------------------------------------------------
# Project: CtrBrom - bootrom - ts-dev
# Project: CtrBrom - bootrom - teg-dev
# File: Makefile
#
# Copyright 2008 Nintendo. All rights reserved.

2
trunk/bootrom/build/buildtools/commondefs
View File

@ -39,7 +39,7 @@ EXO_PLATFORM ?= $(BROM_PLATFORM)
#
# CodeGen Target
#
# BROM_PLATFORM = [TS/TEG/MG20EMU]
# BROM_PLATFORM = [TS/TEG/MG20EMU/NE1EMU]
# BROM_MEMSIZE = [64M/128M]
# BROM_CODEGEN = [ARM/THUMB]
# BROM_PROC = [ARM11/ARM9]

2
trunk/bootrom/build/libraries/os/ARM11/Makefile
View File

@ -28,7 +28,6 @@ BROM_CODEGEN_ALL ?= TRUE
SRCDIR = . ../common
SRCS = \
os_printf.c \
os_init.c \
os_system.c \
os_timer.c \
@ -40,6 +39,7 @@ SRCS = \
os_thread.c \
os_context.c \
os_cache.c \
os_printf.c \
TARGET_LIB = libos$(BROM_LIBSUFFIX).a

2
trunk/bootrom/build/libraries/os/ARM9/Makefile
View File

@ -31,7 +31,6 @@ BROM_PROC = ARM9
SRCDIR = . ../common
SRCS = \
os_printf.c \
os_init.c \
os_system.c \
os_timer.c \
@ -43,6 +42,7 @@ SRCS = \
os_thread.c \
os_context.c \
os_cache.c \
os_printf.c \
TARGET_LIB = libos_sp$(BROM_LIBSUFFIX).a

2
trunk/build/buildtools/commondefs
View File

@ -34,7 +34,7 @@ CTRSDK_VERSION_MAJOR ?= 4
#
# CodeGen Target
#
# CTR_PLATFORM = [TS/TEG/MG20EMU]
# CTR_PLATFORM = [TS/TEG/MG20EMU/NE1EMU]
# CTR_MEMSIZE = [64M/128M]
# CTR_CODEGEN = [ARM/THUMB]
# CTR_PROC = [ARM11/ARM9/ARM7]

34
trunk/include/ctr/hw/ARM11/mmap_global.h
View File

@ -26,14 +26,18 @@ extern "C" {
*---------------------------------------------------------------------------*/
//----------------------------- MAIN
#ifndef SDK_NE1EMU
#define HW_MAIN_MEM 0x20000000
#else // SDK_NE1EMU
#define HW_MAIN_MEM 0x80000000
#endif // SDK_NE1EMU
#define HW_MAIN_MEM_EX HW_MAIN_MEM_END
#define HW_MAIN_MEM_END (HW_MAIN_MEM + HW_MAIN_MEM_SIZE)
#define HW_MAIN_MEM_EX_END (HW_MAIN_MEM + HW_MAIN_MEM_EX_SIZE)
#define HW_MAIN_MEM_SIZE 0x04000000 // 64MB
#define HW_MAIN_MEM_EX_SIZE 0x08000000 // 128MB
#ifndef SDK_MG20EMU
#if !defined(SDK_MG20EMU) && !defined(SDK_NE1EMU)
//----------------------------- AXI-WRAM
#define HW_AXI_WRAM 0x1ff80000
#define HW_AXI_WRAM_END (HW_AXI_WRAM + HW_AXI_WRAM_SIZE)
@ -49,7 +53,7 @@ extern "C" {
#define HW_VRAM_END (HW_VRAM + HW_VRAM_SIZE)
#define HW_VRAM_SIZE 0x400000 // 4MB
#else // SDK_MG20EMU
#else // SDK_MG20EMU || SDK_NE1EMU
//----------------------------- AXI-WRAM
#define HW_AXI_WRAM (HW_AXI_WRAM_END - HW_AXI_WRAM_SIZE)
#define HW_AXI_WRAM_END HW_MAIN_MEM_END
@ -61,11 +65,15 @@ extern "C" {
#define HW_DSP_WRAM_SIZE 0x80000 // 512KB
//----------------------------- VRAM
#ifdef SDK_MG20EMU
#define HW_VRAM 0x1e000000
#else // SDK_NE1EMU
#define HW_VRAM HW_MAIN_MEM_EX_END
#endif // SDK_NE1EMU
#define HW_VRAM_END (HW_VRAM + HW_VRAM_SIZE)
#define HW_VRAM_SIZE 0x400000 // 4MB
#endif // SDK_MG20EMU
#endif // SDK_MG20EMU || SDK_NE1EMU
//----------------------------- IOs
#define HW_IOREG 0x10000000
@ -76,11 +84,15 @@ extern "C" {
#define HW_APB_REG (HW_IOREG + 0x00200000)
#define HW_AHBML_REG (HW_IOREG + 0x00300000)
#define HW_GPU_REG (HW_IOREG + 0x00400000)
#ifndef SDK_MG20EMU
#if !defined(SDK_MG20EMU) && !defined(SDK_NE1EMU)
#define HW_MPCORE_REG (HW_IOREG + 0x07e00000)
#else // SDK_MG20EMU
#else // SDK_MG20EMU || SDK_NE1EMU
#ifdef SDK_MG20EMU
#define HW_MPCORE_REG 0xff000000
#endif // SDK_MG20EMU
#else // SDK_NE1EMU
#define HW_MPCORE_REG 0xc0000000
#endif // SDK_NE1EMU
#endif // SDK_MG20EMU || SDK_NE1EMU
#define HW_AHBP_REG_END (HW_AHBP_REG + HW_AHBP_REG_SIZE)
#define HW_APB_REG_END (HW_APB_REG + HW_APB_REG_SIZE)
#define HW_AHBML_REG_END (HW_AHBML_REG + HW_AHBML_REG_SIZE)
@ -93,13 +105,13 @@ extern "C" {
#define HW_MPCORE_REG_SIZE 0x20000 // 128KB
//----------------------------- System ROM
#ifndef SDK_MG20EMU
#define HW_BIOS_IMG 0x00000000
#define HW_BIOS 0x00010000
#else // SDK_MG20EMU
#ifdef SDK_MG20EMU
#define HW_BIOS_IMG 0xfffe0000
#define HW_BIOS 0xffff0000
#endif // SDK_MG20EMU
#else // include SDK_NE1EMU
#define HW_BIOS_IMG 0x00000000
#define HW_BIOS 0x00010000
#endif // include SDK_NE1EMU
#define HW_BIOS_END (HW_BIOS + HW_BIOS_SIZE)
#define HW_BIOS_SIZE 0x8000 // 32KB