From c087e62b844e18f82f9298cf1fa9f95a820a813b Mon Sep 17 00:00:00 2001 From: nakasima Date: Mon, 19 Jan 2009 03:08:19 +0000 Subject: [PATCH] =?UTF-8?q?MMU=E3=83=A9=E3=82=A4=E3=83=96=E3=83=A9?= =?UTF-8?q?=E3=83=AA=E8=BF=BD=E5=8A=A0=E3=80=82?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit git-svn-id: file:///Volumes/Transfer/gigaleak_20231201/2020-09-30%20-%20paladin.7z/paladin/ctr_firmware@181 b871894f-2f95-9b40-918c-086798483c85 --- .../bootrom/build/libraries/os/ARM11/Makefile | 2 + .../bootrom/build/libraries/os/ARM11/os_mmu.c | 445 ++++++++++++++++++ .../bootrom/build/libraries/os/ARM9/Makefile | 2 + .../libraries/os/ARM9/os_protectionUnit.c | 90 ++++ .../build/libraries/os/common/os_boot.c | 104 ++++ .../build/libraries/os/common/os_cache.c | 88 ++-- trunk/bootrom/include/brom/os.h | 7 +- trunk/bootrom/include/brom/os/ARM11/mmu.h | 268 +++++++++++ .../include/brom/os/ARM9/protectionUnit.h | 68 +++ trunk/bootrom/include/brom/os/common/boot.h | 55 +++ trunk/bootrom/include/brom/os/common/cache.h | 2 - trunk/bootrom/include/brom/os/common/system.h | 5 +- 12 files changed, 1071 insertions(+), 65 deletions(-) create mode 100644 trunk/bootrom/build/libraries/os/ARM11/os_mmu.c create mode 100644 trunk/bootrom/build/libraries/os/ARM9/os_protectionUnit.c create mode 100644 trunk/bootrom/build/libraries/os/common/os_boot.c create mode 100644 trunk/bootrom/include/brom/os/ARM11/mmu.h create mode 100644 trunk/bootrom/include/brom/os/ARM9/protectionUnit.h create mode 100644 trunk/bootrom/include/brom/os/common/boot.h diff --git a/trunk/bootrom/build/libraries/os/ARM11/Makefile b/trunk/bootrom/build/libraries/os/ARM11/Makefile index 6b62344..17dde2d 100644 --- a/trunk/bootrom/build/libraries/os/ARM11/Makefile +++ b/trunk/bootrom/build/libraries/os/ARM11/Makefile @@ -44,6 +44,8 @@ SRCS = \ os_message.c \ os_cache.c \ os_printf.c \ + os_boot.c \ + os_mmu.c \ TARGET_LIB = libos$(BROM_LIBSUFFIX).a diff --git a/trunk/bootrom/build/libraries/os/ARM11/os_mmu.c b/trunk/bootrom/build/libraries/os/ARM11/os_mmu.c new file mode 100644 index 0000000..6970e52 --- /dev/null +++ b/trunk/bootrom/build/libraries/os/ARM11/os_mmu.c @@ -0,0 +1,445 @@ +/*---------------------------------------------------------------------------* + Project: CtrBrom - OS + File: os_mmu.c + + Copyright 2009 Nintendo. All rights reserved. + + These coded instructions, statements, and computer programs contain + proprietary information of Nintendo of America Inc. and/or Nintendo + Company Ltd., and are protected by Federal copyright law. They may + not be disclosed to third parties or copied or duplicated in any form, + in whole or in part, without the prior written consent of Nintendo. + + $Date:: $ + $Rev$ + $Author$ + *---------------------------------------------------------------------------*/ +#include +#include + +//=========================================================================== +// VA TO PA +//=========================================================================== +/*---------------------------------------------------------------------------* + Name: osGetPhysicalAddr + + Description: Get physical address + + Arguments: Virtual address + + Returns: Physical address + *---------------------------------------------------------------------------*/ +asm void* osGetPhysicalAddr( void* vaddr ) +{ + PRESERVE8 + + ldr r3, =HW_C7_VA_SRC_MASK + and r2, r0, r3 + bic r1, r0, r3 + mcr p15, 0, r2, c7, c8, 1 + + mrc p15, 0, r0, c7, c4, 0 + tst r0, #HW_C7_PA_ABORT +LSYM(1) bne BSYM(1) // Error + + ldr r3, =HW_C7_PA_DEST_MASK + and r0, r0, r3 + orr r0, r0, r1 + + bx lr +} + +/*---------------------------------------------------------------------------* + Name: osGetMemRegionType + + Description: Get memory region type + + Arguments: Virtual address + + Returns: Region type + *---------------------------------------------------------------------------*/ +asm u8 osGetMemRegionType( void* vaddr ) +{ + ldr r3, =HW_C7_VA_SRC_MASK + and r2, r0, r3 + mcr p15, 0, r2, c7, c8, 1 + + mrc p15, 0, r0, c7, c4, 0 + tst r0, #HW_C7_PA_ABORT +LSYM(1) bne BSYM(1) // Error + + and r0, r0, #HW_C7_PA_RGT_MASK + mov r0, r0, lsr #HW_C7_PA_RGT_TYPE_SFT + + bx lr +} + +/*---------------------------------------------------------------------------* + Name: osGetMemRegionCacheAttr + + Description: Get memory region cache attribute + + Arguments: Virtual address + + Returns: Region cache attribute + *---------------------------------------------------------------------------*/ +asm u8 osGetMemRegionCacheAttr( void* vaddr ) +{ + ldr r3, =HW_C7_VA_SRC_MASK + and r2, r0, r3 + mcr p15, 0, r2, c7, c8, 1 + + mrc p15, 0, r0, c7, c4, 0 + tst r0, #HW_C7_PA_ABORT +LSYM(1) bne BSYM(1) // Error + + and r0, r0, #HW_C7_PA_L1C_CA_MASK + mov r0, r0, lsr #HW_C7_PA_L1C_CA_SFT + + bx lr +} + +/*---------------------------------------------------------------------------* + Name: osIsMemRegionShareable + + Description: Whether memory region is shareable or not + + Arguments: Virtual address + + Returns: Whether region is shareable or not + *---------------------------------------------------------------------------*/ +asm BOOL osIsMemRegionShareable( void* vaddr ) +{ + ldr r3, =HW_C7_VA_SRC_MASK + and r2, r0, r3 + mcr p15, 0, r2, c7, c8, 1 + + mrc p15, 0, r0, c7, c4, 0 + tst r0, #HW_C7_PA_ABORT +LSYM(1) bne BSYM(1) // Error + + and r0, r0, #HW_C7_PA_SHAREABLE + mov r0, r0, lsr #HW_C7_PA_SHAREABLE_SFT + + bx lr +} + +/*---------------------------------------------------------------------------* + Name: osIsMemRegionAbort + + Description: Whether memory region is abort or not + + Arguments: Virtual address + + Returns: Whether region is shareable or not + *---------------------------------------------------------------------------*/ +asm BOOL osIsMemRegionAbort( void* vaddr ) +{ + ldr r3, =HW_C7_VA_SRC_MASK + and r2, r0, r3 + mcr p15, 0, r2, c7, c8, 1 + + mrc p15, 0, r0, c7, c4, 0 + and r0, r0, #HW_C7_PA_ABORT + + bx lr +} + +//=========================================================================== +// INVALIDATE ALL TLB +//=========================================================================== +/*---------------------------------------------------------------------------* + Name: osInvalidateTLBAll + + Description: Invalidate all main/instruction/data TLBs + + Arguments: None + + Returns: None + *---------------------------------------------------------------------------*/ +asm void osInvalidateTLBAll( void ) +{ + mov r0, #0 + mcr p15, 0, r0, c8, c7, 0 + bx lr +} + +/*---------------------------------------------------------------------------* + Name: osInvalidateITLBAll + + Description: Invalidate all instruction TLB + + Arguments: None + + Returns: None + *---------------------------------------------------------------------------*/ +asm void osInvalidateITLBAll( void ) +{ + mov r0, #0 + mcr p15, 0, r0, c8, c5, 0 + bx lr +} + +/*---------------------------------------------------------------------------* + Name: osInvalidateDTLBAll + + Description: Invalidate all data TLB + + Arguments: None + + Returns: None + *---------------------------------------------------------------------------*/ +asm void osInvalidateDTLBAll( void ) +{ + mov r0, #0 + mcr p15, 0, r0, c8, c6, 0 + bx lr +} + +//=========================================================================== +// INVALIDATE RANGE OF TLB +//=========================================================================== +/*---------------------------------------------------------------------------* + Name: osInvalidateTLBRange + + Description: Invalidate main/instruction/data TLBs in specified range + + Arguments: startAddr start address + nBytes size (in byte) + + Returns: None + *---------------------------------------------------------------------------*/ +asm void osInvalidateTLBRange( void* startAddr, u32 nBytes ) +{ + add r1, r1, r0 + ldr r3, =HW_MMU6_T2_SP_BASE_MASK + and r0, r0, r3 +LSYM(1) + mcr p15, 0, r0, c8, c7, 3 + add r0, r0, #HW_MMU6_T2_SP_SIZE + cmp r0, r1 + blt BSYM(1) + bx lr +} + +/*---------------------------------------------------------------------------* + Name: osInvalidateITLBRange + + Description: Invalidate instruction TLB in specified range + + Arguments: startAddr start address + nBytes size (in byte) + + Returns: None + *---------------------------------------------------------------------------*/ +asm void osInvalidateITLBRange( void* startAddr, u32 nBytes ) +{ + add r1, r1, r0 + ldr r3, =HW_MMU6_T2_SP_BASE_MASK + and r0, r0, r3 +LSYM(1) + mcr p15, 0, r0, c8, c5, 3 + add r0, r0, #HW_MMU6_T2_SP_SIZE + cmp r0, r1 + blt BSYM(1) + bx lr +} + +/*---------------------------------------------------------------------------* + Name: osInvalidateDTLBRange + + Description: Invalidate TLBs in specified range + + Arguments: startAddr start address + nBytes size (in byte) + + Returns: None + *---------------------------------------------------------------------------*/ +asm void osInvalidateDTLBRange( void* startAddr, u32 nBytes ) +{ + add r1, r1, r0 + ldr r3, =HW_MMU6_T2_SP_BASE_MASK + and r0, r0, r3 +LSYM(1) + mcr p15, 0, r0, c8, c6, 3 + add r0, r0, #HW_MMU6_T2_SP_SIZE + cmp r0, r1 + blt BSYM(1) + bx lr +} + +//=========================================================================== +// INVALIDATE ALL TLB With ASID +//=========================================================================== +/*---------------------------------------------------------------------------* + Name: osInvalidateTLBAllWithASID + + Description: Invalidate all main/instruction/data TLBs with ASID + + Arguments: Application Space ID + + Returns: None + *---------------------------------------------------------------------------*/ +asm void osInvalidateTLBAllWithASID( u32 asID ) +{ + and r0, r0, #HW_C8_TLB_ASID_MASK + + mcr p15, 0, r0, c8, c7, 2 + bx lr +} + +/*---------------------------------------------------------------------------* + Name: osInvalidateITLBAllWithASID + + Description: Invalidate all instruction TLB with ASID + + Arguments: Application Space ID + + Returns: None + *---------------------------------------------------------------------------*/ +asm void osInvalidateITLBAllWithASID( u32 asID ) +{ + and r0, r0, #HW_C8_TLB_ASID_MASK + + mcr p15, 0, r0, c8, c5, 2 + bx lr +} + +/*---------------------------------------------------------------------------* + Name: osInvalidateDTLBAllWithASID + + Description: Invalidate all data TLB with ASID + + Arguments: Application Space ID + + Returns: None + *---------------------------------------------------------------------------*/ +asm void osInvalidateDTLBAllWithASID( u32 asID ) +{ + and r0, r0, #HW_C8_TLB_ASID_MASK + + mcr p15, 0, r0, c8, c6, 2 + bx lr +} + +//=========================================================================== +// INVALIDATE RANGE OF TLB WITH ASID +//=========================================================================== +/*---------------------------------------------------------------------------* + Name: osInvalidateTLBRangeWithASID + + Description: Invalidate TLBs in specified rang with ASIDe + + Arguments: startAddr start address + nBytes size (in byte) + asID Application Space ID + + Returns: None + *---------------------------------------------------------------------------*/ +asm void osInvalidateTLBRangeWithASID( void* startAddr, u32 nBytes, u32 asID ) +{ + add r1, r1, r0 + ldr r3, =HW_MMU6_T2_SP_BASE_MASK + and r0, r0, r3 + and r2, r2, #HW_C8_TLB_ASID_MASK + orr r0, r0, r2 +LSYM(1) + mcr p15, 0, r0, c8, c5, 1 + mcr p15, 0, r0, c8, c6, 1 + mcr p15, 0, r0, c8, c7, 1 + add r0, r0, #HW_MMU6_T2_SP_SIZE + cmp r0, r1 + blt BSYM(1) + bx lr +} + +/*---------------------------------------------------------------------------* + Name: osInvalidateITLBRangeWithASID + + Description: Invalidate instruction TLB in specified range with ASID + + Arguments: startAddr start address + nBytes size (in byte) + asID Application Space ID + + Returns: None + *---------------------------------------------------------------------------*/ +asm void osInvalidateITLBRangeWithASID( void* startAddr, u32 nBytes, u32 asID ) +{ + add r1, r1, r0 + ldr r3, =HW_MMU6_T2_SP_BASE_MASK + and r0, r0, r3 + and r2, r2, #HW_C8_TLB_ASID_MASK + orr r0, r0, r2 +LSYM(1) + mcr p15, 0, r0, c8, c5, 1 + add r0, r0, #HW_MMU6_T2_SP_SIZE + cmp r0, r1 + blt BSYM(1) + bx lr +} + +/*---------------------------------------------------------------------------* + Name: osInvalidateDTLBRangeWithASID + + Description: Invalidate TLBs in specified range with ASID + + Arguments: startAddr start address + nBytes size (in byte) + asID Application Space ID + + Returns: None + *---------------------------------------------------------------------------*/ +asm void osInvalidateDTLBRangeWithASID( void* startAddr, u32 nBytes, u32 asID ) +{ + add r1, r1, r0 + ldr r3, =HW_MMU6_T2_SP_BASE_MASK + and r0, r0, r3 + and r2, r2, #HW_C8_TLB_ASID_MASK + orr r0, r0, r2 +LSYM(1) + mcr p15, 0, r0, c8, c6, 1 + add r0, r0, #HW_MMU6_T2_SP_SIZE + cmp r0, r1 + blt BSYM(1) + bx lr +} + +//=========================================================================== +// LOCKDOWN TLB +//=========================================================================== +/*---------------------------------------------------------------------------* + Name: osStartTLBLockDown + + Description: Start TLB Lockdown + + Arguments: TLB ID (0-7) + + Returns: None + *---------------------------------------------------------------------------*/ +asm void osStartTLBLockDown( u32 tlbID ) +{ + mov r0, r0, lsl #HW_C10_TLBL_VICTIM_SFT + and r0, r0, #HW_C10_TLBL_VICTIM_MASK + and r0, r0, #HW_C10_TLBL_PRESERVE + + mcr p15, 0, r0, c10, c0, 0 + bx lr +} + +/*---------------------------------------------------------------------------* + Name: osEndTLBLockDown + + Description: End TLB Lockdown + + Arguments: None + + Returns: None + *---------------------------------------------------------------------------*/ +asm void osEndTLBLockDown( void ) +{ + mov r0, #0 + mcr p15, 0, r0, c10, c0, 0 + bx lr +} + diff --git a/trunk/bootrom/build/libraries/os/ARM9/Makefile b/trunk/bootrom/build/libraries/os/ARM9/Makefile index 6ce3101..1434614 100644 --- a/trunk/bootrom/build/libraries/os/ARM9/Makefile +++ b/trunk/bootrom/build/libraries/os/ARM9/Makefile @@ -47,6 +47,8 @@ SRCS = \ os_message.c \ os_cache.c \ os_printf.c \ + os_boot.c \ + os_protectionUnit.c \ TARGET_LIB = libos_sp$(BROM_LIBSUFFIX).a diff --git a/trunk/bootrom/build/libraries/os/ARM9/os_protectionUnit.c b/trunk/bootrom/build/libraries/os/ARM9/os_protectionUnit.c new file mode 100644 index 0000000..4ff3483 --- /dev/null +++ b/trunk/bootrom/build/libraries/os/ARM9/os_protectionUnit.c @@ -0,0 +1,90 @@ +/*---------------------------------------------------------------------------* + Project: CtrBrom - OS + File: os_protectionUnit.c + + Copyright 2009 Nintendo. All rights reserved. + + These coded instructions, statements, and computer programs contain + proprietary information of Nintendo of America Inc. and/or Nintendo + Company Ltd., and are protected by Federal copyright law. They may + not be disclosed to third parties or copied or duplicated in any form, + in whole or in part, without the prior written consent of Nintendo. + + $Date:: $ + $Rev$ + $Author$ + *---------------------------------------------------------------------------*/ +#include +#include + +//====================================================================== +// protection unit +//====================================================================== +/*---------------------------------------------------------------------------* + Name: osEnableProtectionUnit + + Description: enable protection unit + + Arguments: None + + Returns: None + *---------------------------------------------------------------------------*/ +asm void osEnableProtectionUnit( void ) +{ + mrc p15, 0, r0, c1, c0, 0 + orr r0, r0, #HW_C1_PROTECT_UNIT_ENABLE + mcr p15, 0, r0, c1, c0, 0 + bx lr +} + +/*---------------------------------------------------------------------------* + Name: osDisableProtectionUnit + + Description: disable protection unit + + Arguments: None + + Returns: None + *---------------------------------------------------------------------------*/ +asm void osDisableProtectionUnit( void ) +{ + mrc p15, 0, r0, c1, c0, 0 + bic r0, r0, #HW_C1_PROTECT_UNIT_ENABLE + mcr p15, 0, r0, c1, c0, 0 + bx lr +} + +/*---------------------------------------------------------------------------* + Name: i_osFinalizeProtectionUnit + + Description: finalize protection unit + + Arguments: None + + Returns: None + *---------------------------------------------------------------------------*/ +asm void i_osFinalizeProtectionUnit( void ) +{ + // プロテクションユニット＆キャッシュ無効。ITCM ＆ DTCMは有効 + ldr r0, = HW_C1_ITCM_ENABLE | HW_C1_DTCM_ENABLE | HW_C1_EXCEPT_VEC_UPPER | HW_C1_SB1_BITSET + mcr p15, 0, r0, c1, c0, 0 + + // ITCMの割り当てを解除 +// mov r0, #0 +// mcr p15, 0, r0, c6, c5, 0 + + // DTCMの割り当てを解除 +// mov r0,#0 +// mcr p15, 0, r0, c9, c1, 0 + + // キャッシュ無効化 + mov r0, #0 + mcr p15, 0, r0, c7, c5, 0 // 命令キャッシュ + mcr p15, 0, r0, c7, c6, 0 // データキャッシュ + + // ライトバッファ エンプティ待ち + mcr p15, 0, r0, c7, c10, 4 + + bx lr +} + diff --git a/trunk/bootrom/build/libraries/os/common/os_boot.c b/trunk/bootrom/build/libraries/os/common/os_boot.c new file mode 100644 index 0000000..2b6fedb --- /dev/null +++ b/trunk/bootrom/build/libraries/os/common/os_boot.c @@ -0,0 +1,104 @@ +/*---------------------------------------------------------------------------* + Project: CtrBrom - OS + File: os_boot.c + + Copyright 2009 Nintendo. All rights reserved. + + These coded instructions, statements, and computer programs contain + proprietary information of Nintendo of America Inc. and/or Nintendo + Company Ltd., and are protected by Federal copyright law. They may + not be disclosed to third parties or copied or duplicated in any form, + in whole or in part, without the prior written consent of Nintendo. + + $Date:: $ + $Rev$ + $Author$ + *---------------------------------------------------------------------------*/ +#include +#include + +void i_osBootCore( OSEntryPoint p ); + + +/*---------------------------------------------------------------------------* + Name: i_osFinalize + + Description: finalize + + Arguments: None + + Returns: None + *---------------------------------------------------------------------------*/ +void i_osFinalize(void) +{ + (void)osDisableInterrupts(); + osDisableDCache(); + osFlushDCacheAll(); + osWaitWriteBufferEmpty(); + osDisableICache(); + osInvalidateICacheAll(); +#ifdef SDK_ARM11 + osInvalidateInstPrefetchBuffer(); + osInvalidateBCacheAll(); +#else // SDK_ARM9 + reg_OS_IE = 0; + reg_OS_IF = 0xffffffff; + i_osFinalizeProtectionUnit(); +#endif // SDK_ARM9 +} + +/*---------------------------------------------------------------------------* + Name: i_osClearWorkArea + + Description: clear work area + + Arguments: None + + Returns: None + *---------------------------------------------------------------------------*/ +asm void i_osClearWorkArea( void ) +{ + INASM_EXTERN( |Image$$RW$$Base| ) + INASM_EXTERN( |Image$$ZI$$ZI$$Limit| ) + + CODE32 + + mov r11, lr + + // clear stack with r4-r9 + mov r0, #0 + ldr r1, =|Image$$RW$$Base| + ldr r2, =|Image$$ZI$$ZI$$Limit| + sub r2, r2, r1 + bl i_miCpuClearFast + + bx r11 +} + + +// internal + +asm void i_osBootCore( OSEntryPoint p ) +{ + INASM_EXTERN( i_miCpuClearFast ) + + CODE32 + + mov r11, r0 + + // clear stack with r4-r9 + mov r0, #0 + ldr r1, =HW_BROM_STACK + ldr r2, =HW_BROM_STACK_SIZE + bl i_miCpuClearFast + + mov lr, r11 + + // clear registers + ldr sp, =HW_BROM_STACK + ldmia sp, {r0-r12,sp} + + bx lr +} + + diff --git a/trunk/bootrom/build/libraries/os/common/os_cache.c b/trunk/bootrom/build/libraries/os/common/os_cache.c index a93e3e2..16ec621 100644 --- a/trunk/bootrom/build/libraries/os/common/os_cache.c +++ b/trunk/bootrom/build/libraries/os/common/os_cache.c @@ -15,7 +15,6 @@ $Author$ *---------------------------------------------------------------------------*/ #include - #include //=========================================================================== @@ -30,8 +29,7 @@ Returns: previous state *---------------------------------------------------------------------------*/ - -ASM BOOL osEnableDCache( void ) +asm BOOL osEnableDCache( void ) { PRESERVE8 @@ -52,8 +50,7 @@ ASM BOOL osEnableDCache( void ) Returns: previous stats *---------------------------------------------------------------------------*/ - -ASM BOOL osDisableDCache( void ) +asm BOOL osDisableDCache( void ) { mrc p15, 0, r1, c1, c0, 0 and r0, r1, #HW_C1_DC_ENABLE @@ -72,8 +69,7 @@ ASM BOOL osDisableDCache( void ) Returns: previous state *---------------------------------------------------------------------------*/ - -ASM BOOL osRestoreDCache( BOOL enable ) +asm BOOL osRestoreDCache( BOOL enable ) { //---- 引数処理 cmp r0, #0 @@ -101,8 +97,7 @@ ASM BOOL osRestoreDCache( BOOL enable ) Returns: None. *---------------------------------------------------------------------------*/ - -ASM void osInvalidateDCacheAll( void ) +asm void osInvalidateDCacheAll( void ) { mov r0, #0 mcr p15, 0, r0, c7, c6, 0 @@ -119,8 +114,7 @@ ASM void osInvalidateDCacheAll( void ) Returns: None. *---------------------------------------------------------------------------*/ - -ASM void osStoreDCacheAll( void ) +asm void osStoreDCacheAll( void ) { mov r1, #0 LSYM(1) @@ -149,8 +143,7 @@ LSYM(2) Returns: None. *---------------------------------------------------------------------------*/ - -ASM void osFlushDCacheAll( void ) +asm void osFlushDCacheAll( void ) { mov r12, #0 mov r1, #0 // r1: セットＮｏカウンタ（0 〜 3） @@ -186,8 +179,7 @@ LSYM(2) Returns: None. *---------------------------------------------------------------------------*/ - -ASM void osInvalidateDCacheRange( void* startAddr, u32 nBytes ) +asm void osInvalidateDCacheRange( void* startAddr, u32 nBytes ) { add r1, r1, r0 bic r0, r0, #HW_CACHE_LINE_SIZE - 1 @@ -211,8 +203,7 @@ LSYM(1) Returns: None. *---------------------------------------------------------------------------*/ - -ASM void osStoreDCacheRange( void* startAddr, u32 nBytes ) +asm void osStoreDCacheRange( void* startAddr, u32 nBytes ) { add r1, r1, r0 bic r0, r0, #HW_CACHE_LINE_SIZE - 1 @@ -236,8 +227,7 @@ LSYM(1) Returns: None. *---------------------------------------------------------------------------*/ - -ASM void osFlushDCacheRange( void* startAddr, u32 nBytes ) +asm void osFlushDCacheRange( void* startAddr, u32 nBytes ) { mov r12, #0 add r1, r1, r0 @@ -262,7 +252,6 @@ LSYM(1) Returns: None. *---------------------------------------------------------------------------*/ - void osInvalidateDCacheRangeOrAll( void* startAddr, u32 nBytes ) { if ( nBytes < HW_DC_SIZE ) @@ -286,7 +275,6 @@ void osInvalidateDCacheRangeOrAll( void* startAddr, u32 nBytes ) Returns: None. *---------------------------------------------------------------------------*/ - void osStoreDCacheRangeOrAll( void* startAddr, u32 nBytes ) { if ( nBytes < HW_DC_SIZE ) @@ -310,7 +298,6 @@ void osStoreDCacheRangeOrAll( void* startAddr, u32 nBytes ) Returns: None. *---------------------------------------------------------------------------*/ - void osFlushDCacheRangeOrAll( void* startAddr, u32 nBytes ) { if ( nBytes < HW_DC_SIZE ) @@ -336,8 +323,7 @@ void osFlushDCacheRangeOrAll( void* startAddr, u32 nBytes ) Returns: None. *---------------------------------------------------------------------------*/ - -ASM void osLockdownDCacheRange( void* startAddr, u32 nBytes ) +asm void osLockdownDCacheRange( void* startAddr, u32 nBytes ) { #ifdef SDK_ARM9 INASM_EXTERN( osDisableInterrupts ) @@ -391,8 +377,7 @@ LSYM(1) Returns: None. *---------------------------------------------------------------------------*/ - -ASM void osUnlockdownDCacheAll( void ) +asm void osUnlockdownDCacheAll( void ) { #ifdef SDK_ARM9 mov r3, #0 @@ -411,8 +396,7 @@ ASM void osUnlockdownDCacheAll( void ) Returns: None. *---------------------------------------------------------------------------*/ - -ASM void osUnlockdownDCache( u32 num ) +asm void osUnlockdownDCache( u32 num ) { #ifdef SDK_ARM9 mrc p15, 0, r3, c9, c0, 0 @@ -435,8 +419,7 @@ ASM void osUnlockdownDCache( u32 num ) Returns: None. *---------------------------------------------------------------------------*/ - -ASM void osWaitWriteBufferEmpty( void ) +asm void osWaitWriteBufferEmpty( void ) { mov r0, #0 mcr p15, 0, r0, c7, c10, 4 @@ -454,8 +437,7 @@ ASM void osWaitWriteBufferEmpty( void ) Returns: None. *---------------------------------------------------------------------------*/ - -ASM void osTouchDCacheRange( void* startAddr, u32 nBytes ) +asm void osTouchDCacheRange( void* startAddr, u32 nBytes ) { add r1, r1, r0 bic r0, r0, #HW_CACHE_LINE_SIZE - 1 @@ -483,8 +465,7 @@ LSYM(1) Returns: None *---------------------------------------------------------------------------*/ - -ASM void osKeepDataAccessOrder( void ) +asm void osKeepDataAccessOrder( void ) { mov r0, #0 mcr p15, 0, r0, c7, c10, 5 @@ -506,8 +487,7 @@ ASM void osKeepDataAccessOrder( void ) Returns: previous state *---------------------------------------------------------------------------*/ - -ASM BOOL osEnableICache( void ) +asm BOOL osEnableICache( void ) { mrc p15, 0, r1, c1, c0, 0 and r0, r1, #HW_C1_IC_ENABLE @@ -526,8 +506,7 @@ ASM BOOL osEnableICache( void ) Returns: previous stats *---------------------------------------------------------------------------*/ - -ASM BOOL osDisableICache( void ) +asm BOOL osDisableICache( void ) { mrc p15, 0, r1, c1, c0, 0 and r0, r1, #HW_C1_IC_ENABLE @@ -546,8 +525,7 @@ ASM BOOL osDisableICache( void ) Returns: previous stats *---------------------------------------------------------------------------*/ - -ASM BOOL osRestoreICache( BOOL enable ) +asm BOOL osRestoreICache( BOOL enable ) { //---- 引数処理 cmp r0, #0 @@ -575,8 +553,7 @@ ASM BOOL osRestoreICache( BOOL enable ) Returns: None. *---------------------------------------------------------------------------*/ - -ASM void osInvalidateICacheAll( void ) +asm void osInvalidateICacheAll( void ) { mov r0, #0 mcr p15, 0, r0, c7, c5, 0 @@ -593,8 +570,7 @@ ASM void osInvalidateICacheAll( void ) Returns: None. *---------------------------------------------------------------------------*/ - -ASM void osInvalidateICacheRange( void* startAddr, u32 nBytes ) +asm void osInvalidateICacheRange( void* startAddr, u32 nBytes ) { add r1, r1, r0 bic r0, r0, #HW_CACHE_LINE_SIZE - 1 @@ -617,7 +593,6 @@ LSYM(1) Returns: None. *---------------------------------------------------------------------------*/ - void osInvalidateICacheRangeOrAll( void* startAddr, u32 nBytes ) { if ( nBytes < HW_DC_SIZE ) @@ -642,8 +617,7 @@ void osInvalidateICacheRangeOrAll( void* startAddr, u32 nBytes ) Returns: None. *---------------------------------------------------------------------------*/ - -ASM void osLockdownICacheRange( void* startAddr, u32 nBytes ) +asm void osLockdownICacheRange( void* startAddr, u32 nBytes ) { INASM_EXTERN( osDisableInterrupts ) INASM_EXTERN( osRestoreInterrupts ) @@ -693,8 +667,7 @@ LSYM(1) Returns: None. *---------------------------------------------------------------------------*/ - -ASM void osUnlockdownICacheAll( void ) +asm void osUnlockdownICacheAll( void ) { mov r3, #0 mcr p15, 0, r3, c9, c0, 1 @@ -710,8 +683,7 @@ ASM void osUnlockdownICacheAll( void ) Returns: None. *---------------------------------------------------------------------------*/ - -ASM void osUnlockdownICache( u32 num ) +asm void osUnlockdownICache( u32 num ) { mrc p15, 0, r3, c9, c0, 1 and r3, r3, #HW_C9_LOCKDOWN_WAY_NO_MASK @@ -733,8 +705,7 @@ ASM void osUnlockdownICache( u32 num ) Returns: None. *---------------------------------------------------------------------------*/ - -ASM void osPrefetchICacheRange( void* startAddr, u32 nBytes ) +asm void osPrefetchICacheRange( void* startAddr, u32 nBytes ) { add r1, r1, r0 bic r0, r0, #HW_CACHE_LINE_SIZE - 1 @@ -756,8 +727,7 @@ LSYM(1) Returns: None. *---------------------------------------------------------------------------*/ - -ASM void osInvalidateInstPrefetchBuffer( void ) +asm void osInvalidateInstPrefetchBuffer( void ) { mov r3, #0 mcr p15, 0, r3, c7, c5, 4 @@ -773,7 +743,6 @@ ASM void osInvalidateInstPrefetchBuffer( void ) Returns: None. *---------------------------------------------------------------------------*/ - void osDoInstMemoryBarrierAll( void ) { osStoreDCacheAll(); @@ -793,7 +762,6 @@ void osDoInstMemoryBarrierAll( void ) Returns: None. *---------------------------------------------------------------------------*/ - void osDoInstMemoryBarrierRange( void* startAddr, u32 nBytes ) { osStoreDCacheRange( startAddr, nBytes ); @@ -815,8 +783,7 @@ void osDoInstMemoryBarrierRange( void* startAddr, u32 nBytes ) Returns: None. *---------------------------------------------------------------------------*/ - -ASM void osInvalidateBCacheAll( void ) +asm void osInvalidateBCacheAll( void ) { mov r3, #0 mcr p15, 0, r3, c7, c5, 6 @@ -833,8 +800,7 @@ ASM void osInvalidateBCacheAll( void ) Returns: None. *---------------------------------------------------------------------------*/ - -ASM void osInvalidateBCacheRange( void* startAddr, u32 nBytes ) +asm void osInvalidateBCacheRange( void* startAddr, u32 nBytes ) { add r1, r1, r0 bic r0, r0, #1 diff --git a/trunk/bootrom/include/brom/os.h b/trunk/bootrom/include/brom/os.h index 1b3f79f..495d2f5 100644 --- a/trunk/bootrom/include/brom/os.h +++ b/trunk/bootrom/include/brom/os.h @@ -42,10 +42,15 @@ extern "C" { #include #include #include +#include + +#ifdef SDK_ARM9 +#include +#endif // SDK_ARM9 + #if 0 #include #include -#include #ifdef SDK_ARM9 #include diff --git a/trunk/bootrom/include/brom/os/ARM11/mmu.h b/trunk/bootrom/include/brom/os/ARM11/mmu.h new file mode 100644 index 0000000..d238d95 --- /dev/null +++ b/trunk/bootrom/include/brom/os/ARM11/mmu.h @@ -0,0 +1,268 @@ +/*---------------------------------------------------------------------------* + Project: CtrBrom - OS - include + File: mmu.h + + Copyright 2009 Nintendo. All rights reserved. + + These coded instructions, statements, and computer programs contain + proprietary information of Nintendo of America Inc. and/or Nintendo + Company Ltd., and are protected by Federal copyright law. They may + not be disclosed to third parties or copied or duplicated in any form, + in whole or in part, without the prior written consent of Nintendo. + + $Date:: $ + $Rev$ + $Author$ + *---------------------------------------------------------------------------*/ +#ifndef BROM_OS_MMU_H_ +#define BROM_OS_MMU_H_ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + + +//=========================================================================== +// VA TO PA +//=========================================================================== +/*---------------------------------------------------------------------------* + Name: osGetPhysicalAddr + + Description: Get physical address + + Arguments: Virtual address + + Returns: Physical address + *---------------------------------------------------------------------------*/ +void* osGetPhysicalAddr( void* vaddr ); + +/*---------------------------------------------------------------------------* + Name: osGetMemRegionType + + Description: Get memory region type + + Arguments: Virtual address + + Returns: Region type + *---------------------------------------------------------------------------*/ +u8 osGetMemRegionType( void* vaddr ); + +/*---------------------------------------------------------------------------* + Name: osGetMemRegionCacheAttr + + Description: Get memory region cache attribute + + Arguments: Virtual address + + Returns: Region cache attribute + *---------------------------------------------------------------------------*/ +u8 osGetMemRegionCacheAttr( void* vaddr ); + +/*---------------------------------------------------------------------------* + Name: osIsMemRegionShareable + + Description: Whether memory region is shareable or not + + Arguments: Virtual address + + Returns: Whether region is shareable or not + *---------------------------------------------------------------------------*/ +BOOL osIsMemRegionShareable( void* vaddr ); + +/*---------------------------------------------------------------------------* + Name: osIsMemRegionAbort + + Description: Whether memory region is abort or not + + Arguments: Virtual address + + Returns: Whether region is shareable or not + *---------------------------------------------------------------------------*/ +BOOL osIsMemRegionAbort( void* vaddr ); + +//=========================================================================== +// INVALIDATE ALL TLB +//=========================================================================== +/*---------------------------------------------------------------------------* + Name: osInvalidateTLBAll + + Description: Invalidate all main/instruction/data TLBs + + Arguments: None + + Returns: None + *---------------------------------------------------------------------------*/ +void osInvalidateTLBAll( void ); + +/*---------------------------------------------------------------------------* + Name: osInvalidateITLBAll + + Description: Invalidate all instruction TLB + + Arguments: None + + Returns: None + *---------------------------------------------------------------------------*/ +void osInvalidateITLBAll( void ); + +/*---------------------------------------------------------------------------* + Name: osInvalidateDTLBAll + + Description: Invalidate all data TLB + + Arguments: None + + Returns: None + *---------------------------------------------------------------------------*/ +void osInvalidateDTLBAll( void ); + +//=========================================================================== +// INVALIDATE RANGE OF TLB +//=========================================================================== +/*---------------------------------------------------------------------------* + Name: osInvalidateTLBRange + + Description: Invalidate main/instruction/data TLBs in specified range + + Arguments: startAddr start address + nBytes size (in byte) + + Returns: None + *---------------------------------------------------------------------------*/ +void osInvalidateTLBRange( void* startAddr, u32 nBytes ); + +/*---------------------------------------------------------------------------* + Name: osInvalidateITLBRange + + Description: Invalidate instruction TLB in specified range + + Arguments: startAddr start address + nBytes size (in byte) + + Returns: None + *---------------------------------------------------------------------------*/ +void osInvalidateITLBRange( void* startAddr, u32 nBytes ); + +/*---------------------------------------------------------------------------* + Name: osInvalidateDTLBRange + + Description: Invalidate TLBs in specified range + + Arguments: startAddr start address + nBytes size (in byte) + + Returns: None + *---------------------------------------------------------------------------*/ +void osInvalidateDTLBRange( void* startAddr, u32 nBytes ); + +//=========================================================================== +// INVALIDATE ALL TLB With ASID +//=========================================================================== +/*---------------------------------------------------------------------------* + Name: osInvalidateTLBAllWithASID + + Description: Invalidate all main/instruction/data TLBs with ASID + + Arguments: Application Space ID + + Returns: None + *---------------------------------------------------------------------------*/ +void osInvalidateTLBAllWithASID( u32 asID ); + +/*---------------------------------------------------------------------------* + Name: osInvalidateITLBAllWithASID + + Description: Invalidate all instruction TLB with ASID + + Arguments: Application Space ID + + Returns: None + *---------------------------------------------------------------------------*/ +void osInvalidateITLBAllWithASID( u32 asID ); + +/*---------------------------------------------------------------------------* + Name: osInvalidateDTLBAllWithASID + + Description: Invalidate all data TLB with ASID + + Arguments: Application Space ID + + Returns: None + *---------------------------------------------------------------------------*/ +void osInvalidateDTLBAllWithASID( u32 asID ); + +//=========================================================================== +// INVALIDATE RANGE OF TLB WITH ASID +//=========================================================================== +/*---------------------------------------------------------------------------* + Name: osInvalidateTLBRangeWithASID + + Description: Invalidate TLBs in specified rang with ASIDe + + Arguments: startAddr start address + nBytes size (in byte) + asID Application Space ID + + Returns: None + *---------------------------------------------------------------------------*/ +void osInvalidateTLBRangeWithASID( void* startAddr, u32 nBytes, u32 asID ); + +/*---------------------------------------------------------------------------* + Name: osInvalidateITLBRangeWithASID + + Description: Invalidate instruction TLB in specified range with ASID + + Arguments: startAddr start address + nBytes size (in byte) + asID Application Space ID + + Returns: None + *---------------------------------------------------------------------------*/ +void osInvalidateITLBRangeWithASID( void* startAddr, u32 nBytes, u32 asID ); + +/*---------------------------------------------------------------------------* + Name: osInvalidateDTLBRangeWithASID + + Description: Invalidate TLBs in specified range with ASID + + Arguments: startAddr start address + nBytes size (in byte) + asID Application Space ID + + Returns: None + *---------------------------------------------------------------------------*/ +void osInvalidateDTLBRangeWithASID( void* startAddr, u32 nBytes, u32 asID ); + +//=========================================================================== +// LOCKDOWN TLB +//=========================================================================== +/*---------------------------------------------------------------------------* + Name: osStartTLBLockDown + + Description: Start TLB Lockdown + + Arguments: TLB ID (0-7) + + Returns: None + *---------------------------------------------------------------------------*/ +void osStartTLBLockDown( u32 tlbID ); + +/*---------------------------------------------------------------------------* + Name: osEndTLBLockDown + + Description: End TLB Lockdown + + Arguments: None + + Returns: None + *---------------------------------------------------------------------------*/ +void osEndTLBLockDown( void ); + + +#ifdef __cplusplus +} // extern "C" +#endif + +#endif // BROM_OS_MMU_H_ diff --git a/trunk/bootrom/include/brom/os/ARM9/protectionUnit.h b/trunk/bootrom/include/brom/os/ARM9/protectionUnit.h new file mode 100644 index 0000000..0f29659 --- /dev/null +++ b/trunk/bootrom/include/brom/os/ARM9/protectionUnit.h @@ -0,0 +1,68 @@ +/*---------------------------------------------------------------------------* + Project: CtrBrom - OS - include + File: protectionUnit.h + + Copyright 2009 Nintendo. All rights reserved. + + These coded instructions, statements, and computer programs contain + proprietary information of Nintendo of America Inc. and/or Nintendo + Company Ltd., and are protected by Federal copyright law. They may + not be disclosed to third parties or copied or duplicated in any form, + in whole or in part, without the prior written consent of Nintendo. + + $Date:: $ + $Rev$ + $Author$ + *---------------------------------------------------------------------------*/ +#ifndef BROM_OS_PROTECTIONUNIT_H_ +#define BROM_OS_PROTECTIONUNIT_H_ + +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +//====================================================================== +// protection unit +//====================================================================== +/*---------------------------------------------------------------------------* + Name: osEnableProtectionUnit + + Description: enable protection unit + + Arguments: None + + Returns: None + *---------------------------------------------------------------------------*/ +void osEnableProtectionUnit(void); + +/*---------------------------------------------------------------------------* + Name: osDisableProtectionUnit + + Description: disable protection unit + + Arguments: None + + Returns: None + *---------------------------------------------------------------------------*/ +void osDisableProtectionUnit(void); + +/*---------------------------------------------------------------------------* + Name: i_osFinalizeProtectionUnit + + Description: finalize protection unit + + Arguments: None + + Returns: None + *---------------------------------------------------------------------------*/ +void i_osFinalizeProtectionUnit( void ); + +#ifdef __cplusplus +} /* extern "C" */ +#endif + +/* BROM_OS_PROTECTIONUNIT_H_ */ +#endif diff --git a/trunk/bootrom/include/brom/os/common/boot.h b/trunk/bootrom/include/brom/os/common/boot.h new file mode 100644 index 0000000..7682cb5 --- /dev/null +++ b/trunk/bootrom/include/brom/os/common/boot.h @@ -0,0 +1,55 @@ +/*---------------------------------------------------------------------------* + Project: CtrBrom - OS - include + File: boot.h + + Copyright 2009 Nintendo. All rights reserved. + + These coded instructions, statements, and computer programs contain + proprietary information of Nintendo of America Inc. and/or Nintendo + Company Ltd., and are protected by Federal copyright law. They may + not be disclosed to third parties or copied or duplicated in any form, + in whole or in part, without the prior written consent of Nintendo. + + $Date:: $ + $Rev$ + $Author$ + *---------------------------------------------------------------------------*/ +#ifndef BROM_OS_BOOT_H_ +#define BROM_OS_BOOT_H_ + +#include +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/*---------------------------------------------------------------------------* + Name: i_osFinalize + + Description: finalize + + Arguments: None + + Returns: None + *---------------------------------------------------------------------------*/ +void i_osFinalize(void); + +/*---------------------------------------------------------------------------* + Name: i_osClearWorkArea + + Description: clear work area + + Arguments: None + + Returns: None + *---------------------------------------------------------------------------*/ +void i_osClearWorkArea( void ); + +#ifdef __cplusplus +} /* extern "C" */ +#endif + +/* BROM_OS_BOOT_H_ */ +#endif diff --git a/trunk/bootrom/include/brom/os/common/cache.h b/trunk/bootrom/include/brom/os/common/cache.h index f6a3044..216eefb 100644 --- a/trunk/bootrom/include/brom/os/common/cache.h +++ b/trunk/bootrom/include/brom/os/common/cache.h @@ -330,7 +330,6 @@ static inline void osCleanAndInvalidateDCacheRange( void *startAddr, u32 nBytes Returns: None. *---------------------------------------------------------------------------*/ - static inline void osPreloadDCacheRange( void *startAddr, u32 nBytes ) { osTouchDCacheRange( startAddr, nBytes ); @@ -345,7 +344,6 @@ static inline void osPreloadDCacheRange( void *startAddr, u32 nBytes ) Returns: None *---------------------------------------------------------------------------*/ - static inline void osDoDataMemoryBarrier( void ) { osKeepDataAccessOrder(); diff --git a/trunk/bootrom/include/brom/os/common/system.h b/trunk/bootrom/include/brom/os/common/system.h index c19ede2..f8670f7 100644 --- a/trunk/bootrom/include/brom/os/common/system.h +++ b/trunk/bootrom/include/brom/os/common/system.h @@ -33,6 +33,10 @@ extern "C" { typedef u32 OSCpuCycle; +//---- entry point type +typedef void (*OSEntryPoint) (void); + + #define OS_CPU_CLOCK HW_CPU_CLOCK //---- sec to cpu cycle @@ -186,7 +190,6 @@ void osHalt(void); Returns: None *---------------------------------------------------------------------------*/ - void osHaltUntilEvent( void ); #endif // SDK_ARM11