rvtr/ctr_firmware
1
Fork 0
mirror of https://github.com/rvtr/ctr_firmware.git synced 2025-10-31 07:51:08 -04:00
Code Issues Actions Packages Projects Releases Wiki Activity

ブートROMのMMU設定をセクションからラージページへ。

Browse Source 
git-svn-id: file:///Volumes/Transfer/gigaleak_20231201/2020-09-30%20-%20paladin.7z/paladin/ctr_firmware@84 b871894f-2f95-9b40-918c-086798483c85
This commit is contained in:
nakasima 2008-12-08 04:55:04 +00:00
parent 0e9b0ad1f2
commit bf03e2fbf9
1 changed files with 2 additions and 14 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
trunk/bootrom/build/libraries/init/ARM11/crt0_secure.c
View File

@ -431,7 +431,7 @@ void stupInitMMUTable( void )
table = &t1Base[paddr/HW_MMU6_T1_SEC_SIZE]; table = &t1Base[paddr/HW_MMU6_T1_SEC_SIZE];
*table = HW_MMU6_T1_COURSE_PACK( (u32)t2Base, 0 ); *table = HW_MMU6_T1_COURSE_PACK( (u32)t2Base, 0 );
// T2 for Page // T2 for Page
table = t2Base; table = &t2Base[paddr%HW_MMU6_T1_SEC_SIZE/HW_MMU6_T2_LP_ALIAS_SIZE];
while ( paddr < MATH_ROUNDDOWN(HW_BROM_MMU_TBL, HW_MMU6_T2_LP_SIZE) ) while ( paddr < MATH_ROUNDDOWN(HW_BROM_MMU_TBL, HW_MMU6_T2_LP_SIZE) )
{ {
*table++ = HW_MMU6_T2_LP_PACK( *table++ = HW_MMU6_T2_LP_PACK(
@ -483,21 +483,10 @@ void stupInitMMUTable( void )
// BROM Region (64KBx2 cached) // BROM Region (64KBx2 cached)
paddr = HW_BROM_IMG; paddr = HW_BROM_IMG;
#if 1
table = &t1Base[paddr/HW_MMU6_T1_SEC_SIZE];
*table++ = HW_MMU6_T1_SEC_PACK(
paddr,
HW_MMU6_T1_APX_S_RW_U_NA,
HW_MMU6_T2_LP_RGT_L1C_WB_WA,
HW_MMU6_T1_GLOBAL,
HW_MMU6_T2_SHARED,
FALSE,
0);
#else
table = &t1Base[paddr/HW_MMU6_T1_SEC_SIZE]; table = &t1Base[paddr/HW_MMU6_T1_SEC_SIZE];
*table = HW_MMU6_T1_COURSE_PACK( (u32)t2Base, 0 ); *table = HW_MMU6_T1_COURSE_PACK( (u32)t2Base, 0 );
// T2 for Page // T2 for Page
table = t2Base; table = &t2Base[paddr%HW_MMU6_T1_SEC_SIZE/HW_MMU6_T2_LP_ALIAS_SIZE];
while ( paddr != HW_BROM_END ) while ( paddr != HW_BROM_END )
{ {
*table++ = HW_MMU6_T2_LP_PACK( *table++ = HW_MMU6_T2_LP_PACK(
@ -511,7 +500,6 @@ void stupInitMMUTable( void )
} }
// Coarse page is 1KB boundary // Coarse page is 1KB boundary
t2Base += MATH_ROUNDUP(HW_BROM_SIZE*2/HW_MMU6_T2_LP_ALIAS_SIZE, HW_MMU6_T1_CORS_SIZE)/sizeof(t2Base[0]); t2Base += MATH_ROUNDUP(HW_BROM_SIZE*2/HW_MMU6_T2_LP_ALIAS_SIZE, HW_MMU6_T1_CORS_SIZE)/sizeof(t2Base[0]);
#endif
} }