MG20EMU用レジスタ定義パッチ追加。

git-svn-id: file:///Volumes/Transfer/gigaleak_20231201/2020-09-30%20-%20paladin.7z/paladin/ctr_firmware@169 b871894f-2f95-9b40-918c-086798483c85
This commit is contained in:
nakasima 2009-01-14 02:11:37 +00:00
parent fcc8c00e7a
commit bba8750b22
7 changed files with 53 additions and 10 deletions

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@ -136,7 +136,7 @@ asm void i_stupInitCP15(void)
; Region 0: MAIN_MEM: Base = 0x20000000, Size = 128MB, I:NC NB / D:NC NB, I:NA / D:RW
; Region 1: IO_AXIRAM: Base = 0x10000000, Size = 256MB, I:NC NB / D:NC NB, I:NA / D:RW
; Region 2: PRV_WRAM: Base = 0x08000000, Size = 1MB, I:Cach Buf / D:Cach Buf, I:NA / D:RW
; Region 3: PRV_WRAM_SYSRV:Base = 0x08000000, Size = 4MB, I:Cach Buf / D:Cach Buf, I:RO / D:RW
; Region 3: PRV_WRAM_SYSRV:Base = 0x08000000, Size = 4KB, I:Cach Buf / D:Cach Buf, I:RO / D:RW
; Region 4: DTCM: Base = 0xfffe0000, Size = 16KB, I:NC NB / D:NC NB, I:NA / D:RW
; Region 5: ITCM: Base = 0x07ff8000, Size = 32KB, I:Cach Buf / D:NC NB, I:RO / D:RW
; Region 6: BIOS: Base = 0xffff0000, Size = 64KB, I:Cach NB / D:Cach NB, I:RO / D:RO
@ -167,8 +167,13 @@ asm void i_stupInitCP15(void)
SET_PROTECTION_B( c2, HW_PRV_WRAM, 1MB )
//---- PRV_WRAM_SYSRV
#ifndef SDK_MG20EMU
SET_PROTECTION_A( c3, HW_PRV_WRAM_SYSRV, 4KB )
SET_PROTECTION_B( c3, HW_PRV_WRAM_SYSRV, 4KB )
#else // SDK_MG20EMU
SET_PROTECTION_A( c3, HW_MG20IOP_REG, 1MB )
SET_PROTECTION_B( c3, HW_MG20IOP_REG, 1MB )
#endif // SDK_MG20EMU
//---- ƒf<C692>[ƒ^ TCM
ldr r0, =STUPi_HW_DTCM
@ -238,7 +243,11 @@ asm void i_stupInitCP15(void)
// BIOS : RO
// SHARED : NA
//
#ifndef SDK_MG20EMU
ldr r0, =REGION_ACC(NA,NA,NA,RO,NA,RO,RO,NA)
#else // SDK_MG20EMU
ldr r0, =REGION_ACC(NA,NA,RO,NA,NA,RO,RO,NA)
#endif // SDK_MG20EMU
mcr p15, 0, r0, c5, c0, 3
//
@ -250,12 +259,12 @@ asm void i_stupInitCP15(void)
// DTCM : RW
// ITCM : RW
// BIOS : RO
// SHARED : NA
// SHARED : RW
//
#ifdef BROM_ENABLE_BOOTROM_WRITE
ldr r0, =REGION_ACC(RW,RW,RW,RW,RW,RW,RW,NA)
ldr r0, =REGION_ACC(RW,RW,RW,RW,RW,RW,RW,RW)
#else // BROM_ENABLE_BOOTROM_WRITE
ldr r0, =REGION_ACC(RW,RW,RW,RW,RW,RW,RO,NA)
ldr r0, =REGION_ACC(RW,RW,RW,RW,RW,RW,RO,RW)
#endif // BROM_ENABLE_BOOTROM_WRITE
mcr p15, 0, r0, c5, c0, 2

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@ -67,8 +67,7 @@ asm void osIrqHandler( void )
#else // SDK_ARM9
// get IE address
mov r12, #HW_REG_BASE
add r12, r12, #REG_IE_OFFSET // r12: REG_IE address
ldr r12, =REG_IE_ADDR // r12: REG_IE address
// get IE&IF
ldmia r12, { r1-r2 } // r1: IE, r2: IF

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@ -30,6 +30,10 @@ TARGET_PREFIX = $(subst .h,,$(TARGET))
TARGET_SUBFILES = $(TARGET_PREFIX)_*.h
TARGET_TMPCSV = $(TARGET_PREFIX).csv
MG20_SUFFIX = _mg20patch
CSVSRC_PATCH = $(basename $(CSVSRC))$(MG20_SUFFIX)$(suffix $(CSVSRC))
# build
TARGETS = $(TARGET) $(TARGET_SUBFILES)
@ -52,9 +56,14 @@ include $(CTRFIRM_ROOT)/build/buildtools/commondefs
do-build: $(TARGET)
$(TARGET): $(CSVSRC) $(SCRIPT)
$(TARGET): $(CSVSRC) $(CSVSRC_PATCH) $(SCRIPT)
$(CP) $(CSVSRC) $(TARGET_TMPCSV)
$(PERL) $(SCRIPT) $(TARGET_TMPCSV)
ifeq ($(CTR_PLATFORM),MG20EMU)
$(CP) $(CSVSRC_PATCH) $(TARGET_TMPCSV)
$(PERL) $(SCRIPT) -s $(TARGET_TMPCSV)
else
endif
#----------------------------------------------------------------------------

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@ -582,7 +582,6 @@ ENDDOC
# コマンドラインオプションの設定
#
# -vか-verboseが指定されているとverboseモード
if ($v == 1 || $verbose == 1) {
$verbose_mode = 1;
@ -598,6 +597,14 @@ if ($nodup == 1) {
$duplicate_ok = 1;
}
# -sが指定されているとマスターファイル非生成モード
if ($s) {
$cancel_master_file = 1;
verbose("cancel master file mode on\n");
} else {
$cancel_master_file = 0;
}
@ -653,6 +660,10 @@ foreach $filename (@ARGV) {
output($output_filename, $category);
}
if ($cancel_master_file) {
exit(0);
}
my $master_filename = $filename;
if (($master_filename =~ s/\.csv/\.h/) == 0) {
$master_filename .= ".h";

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@ -0,0 +1,11 @@
$OS:HW_MG20IOP_REG,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
#offset,condition,name,bit,rw,category,volatile/permanent,fieldname,shift,bit,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
#Š„è<E2809A>žÝ,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
0x10004,,IE,32,rw,OS,volatile,D3,31,1,D2,30,1,D1,29,1,D0,28,1,LMC,27,1,CGC_DET,26,1,CGC_I,25,1,CMC2,24,1,CMC1,23,1,RSA,22,1,J_TX,21,1,J_RX,20,1,SD3_A,19,1,SD3,18,1,SD1_A,17,1,SD1,16,1,AES,15,1,PXI_RX,14,1,PXI_TX,13,1,A11,12,1,T3,6,1,T2,5,1,T1,4,1,T0,3,1
0x10008,,IF,32,rw,OS,volatile,D3,31,1,D2,30,1,D1,29,1,D0,28,1,LMC,27,1,CGC_DET,26,1,CGC_I,25,1,CMC2,24,1,CMC1,23,1,RSA,22,1,J_TX,21,1,J_RX,20,1,SD3_A,19,1,SD3,18,1,SD1_A,17,1,SD1,16,1,AES,15,1,PXI_RX,14,1,PXI_TX,13,1,A11,12,1,T3,6,1,T2,5,1,T1,4,1,T0,3,1
#ƒ^ƒCƒ},,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
0x30000,,TM0CNT_L,16,rw,OS,volatile,CTR,0,16,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
0x30002,,TM0CNT_H,16,rw,OS,volatile,E,7,1,I,6,1,PS,0,2,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
0x30004,,TM1CNT_L,16,rw,OS,volatile,CTR,0,16,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
0x30006,,TM1CNT_H,16,rw,OS,volatile,E,7,1,I,6,1,CH,2,1,PS,0,2,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
1 $OS:HW_MG20IOP_REG
2 #offset condition name bit rw category volatile/permanent fieldname shift bit
3 #Š„‚è�ž‚Ý
4 0x10004 IE 32 rw OS volatile D3 31 1 D2 30 1 D1 29 1 D0 28 1 LMC 27 1 CGC_DET 26 1 CGC_I 25 1 CMC2 24 1 CMC1 23 1 RSA 22 1 J_TX 21 1 J_RX 20 1 SD3_A 19 1 SD3 18 1 SD1_A 17 1 SD1 16 1 AES 15 1 PXI_RX 14 1 PXI_TX 13 1 A11 12 1 T3 6 1 T2 5 1 T1 4 1 T0 3 1
5 0x10008 IF 32 rw OS volatile D3 31 1 D2 30 1 D1 29 1 D0 28 1 LMC 27 1 CGC_DET 26 1 CGC_I 25 1 CMC2 24 1 CMC1 23 1 RSA 22 1 J_TX 21 1 J_RX 20 1 SD3_A 19 1 SD3 18 1 SD1_A 17 1 SD1 16 1 AES 15 1 PXI_RX 14 1 PXI_TX 13 1 A11 12 1 T3 6 1 T2 5 1 T1 4 1 T0 3 1
6 #ƒ^ƒCƒ}
7 0x30000 TM0CNT_L 16 rw OS volatile CTR 0 16
8 0x30002 TM0CNT_H 16 rw OS volatile E 7 1 I 6 1 PS 0 2
9 0x30004 TM1CNT_L 16 rw OS volatile CTR 0 16
10 0x30006 TM1CNT_H 16 rw OS volatile E 7 1 I 6 1 CH 2 1 PS 0 2

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@ -100,6 +100,9 @@ extern "C" {
#define HW_IOREG_END 0x10000000
#define HW_REG_BASE HW_IOREG // alias
#define HW_MG20IOP_REG 0x40000000
#define HW_MG20IOP_REG_END 0x40100000
#endif // SDK_MG20EMU
#define HW_PRV_REG (HW_IOREG + 0)

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@ -8,12 +8,13 @@
export CTRFIRM_ROOT=`cygpath -m $PWD`
export CTRBROM_ROOT=$CTRFIRM_ROOT/bootrom
export CTRSDK_ROOT=$CTRFIRM_ROOT
export BROM_PLATFORM='MG20EMU'
export CTR_PLATFORM='MG20EMU'
export BROM_PLATFORM=$CTR_PLATFORM
export CYGPATH_NOCMD='TRUE'
echo "Set CTRFIRM_ROOT: $CTRFIRM_ROOT"
echo "Set CTRBROM_ROOT: $CTRBROM_ROOT"
echo "Set CTRSDK_ROOT: $CTRSDK_ROOT"
echo "Set BROM_PLATFORM: $BROM_PLATFORM"
echo "Set CTR_PLATFORM: $CTR_PLATFORM"
echo "Set CYGPATH_NOCMD: $CYGPATH_NOCMD"