Thumb-SWI命令に対応。

git-svn-id: file:///Volumes/Transfer/gigaleak_20231201/2020-09-30%20-%20paladin.7z/paladin/ctr_firmware@223 b871894f-2f95-9b40-918c-086798483c85
This commit is contained in:
nakasima 2009-01-28 06:38:08 +00:00
parent 906a7c49ee
commit bad2d57a2f
6 changed files with 19 additions and 17 deletions

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@ -42,11 +42,11 @@ LSYM(0)
#ifdef SDK_ARM11 #ifdef SDK_ARM11
// disable VFP // disable VFP
#ifndef SDK_NE1EMU #ifdef SDK_MG20EMU
fmrx r12, fpexc fmrx r12, fpexc
bic r12, r12, #HW_FPEXC_VFP_ENABLE bic r12, r12, #HW_FPEXC_VFP_ENABLE
fmxr fpexc, r12 fmxr fpexc, r12
#endif // SDK_NE1EMU #endif // SDK_MG20EMU
#endif // SDK_ARM11 #endif // SDK_ARM11
bx lr bx lr
@ -171,7 +171,7 @@ asm void i_stupSwiVeneer( void )
*---------------------------------------------------------------------------*/ *---------------------------------------------------------------------------*/
asm void i_stupUndefVeneer( void ) asm void i_stupUndefVeneer( void )
{ {
ldr pc, =HW_UDEF_VENEER_BUF ldr pc, =HW_UNDEF_VENEER_BUF
LTORG LTORG
} }
@ -239,15 +239,16 @@ asm void i_stupSwiHandler( void )
{ {
INASM_EXTERN( _start ) INASM_EXTERN( _start )
// 不正確データアボート有効化clear HW_PSR_IMPRECISE_ABORT // 不正確データアボート有効化clear HW_PSR_IMPR_ABORT_DISABLE
// FIQハンドラでのSWI使用時のSP_svc上書き防止のため最初にFIQを禁止IRQはHWが禁止する // FIQハンドラでのSWI使用時のSP_svc上書き防止のため最初にFIQを禁止IRQはHWが禁止する
msr cpsr_cxsf, #(HW_PSR_SVC_MODE | HW_PSR_IRQ_DISABLE | HW_PSR_FIQ_DISABLE) msr cpsr_cxsf, #(HW_PSR_SVC_MODE | HW_PSR_IRQ_DISABLE | HW_PSR_FIQ_DISABLE)
// SVCモード // SVCモード
mrs sp, spsr mrs sp, spsr // ※SP_svc
and sp, #HW_PSR_CPU_MODE_MASK
// ユーザモードならシステムモードへ // ユーザモードならシステムモードへ
tst sp, #HW_PSR_SYS_MODE ^ HW_PSR_USR_MODE cmp sp, #HW_PSR_USR_MODE
orreq sp, sp, #HW_PSR_SYS_MODE moveq sp, #HW_PSR_SYS_MODE
// 割り込み禁止 // 割り込み禁止
orr sp, sp, #(HW_PSR_IRQ_DISABLE | HW_PSR_FIQ_DISABLE) orr sp, sp, #(HW_PSR_IRQ_DISABLE | HW_PSR_FIQ_DISABLE)
msr cpsr_cxsf, sp msr cpsr_cxsf, sp
@ -263,10 +264,11 @@ asm void i_stupSwiHandler( void )
mov r12, lr mov r12, lr
mrs r11, spsr mrs r11, spsr
stmfd sp!, {r11, lr} // SPSR_svc、LR_svcを退避 stmfd sp!, {r11, lr} // SPSR_svc、LR_svcを退避
// 割り込み状態継承
and r11, r11, #(HW_PSR_CPU_MODE_MASK | HW_PSR_IRQ_DISABLE | HW_PSR_FIQ_DISABLE)
// ユーザモードならシステムモードへ // ユーザモードならシステムモードへ
tst r11, #HW_PSR_SYS_MODE ^ HW_PSR_USR_MODE tst r11, #HW_PSR_SYS_MODE ^ HW_PSR_USR_MODE
orreq r11, r11, #HW_PSR_SYS_MODE orreq r11, r11, #HW_PSR_SYS_MODE
// 割り込み状態継承
msr cpsr_cxsf, r11 msr cpsr_cxsf, r11
// 呼び出し元のモード // 呼び出し元のモード

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@ -38,7 +38,7 @@ void osInitException( void )
{ {
isInit = TRUE; isInit = TRUE;
*(OSExcpHandler*)HW_UDEF_VECTOR_BUF = i_osUndefInstHandler; *(OSExcpHandler*)HW_UNDEF_VECTOR_BUF = i_osUndefInstHandler;
} }
#endif // SDK_ARM11 #endif // SDK_ARM11
} }

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@ -49,7 +49,7 @@ asm void osIrqHandler( void )
EXPORT i_osIrqHandlerReturn EXPORT i_osIrqHandlerReturn
#ifdef SDK_ARM11 #ifdef SDK_ARM11
// 不正確データアボート有効化clear HW_PSR_IMPRECISE_ABORT // 不正確データアボート有効化clear HW_PSR_IMPR_ABORT_DISABLE
msr cpsr_fsxc, #(HW_PSR_IRQ_MODE | HW_PSR_IRQ_DISABLE | HW_PSR_FIQ_DISABLE) msr cpsr_fsxc, #(HW_PSR_IRQ_MODE | HW_PSR_IRQ_DISABLE | HW_PSR_FIQ_DISABLE)
#endif // SDK_ARM11 #endif // SDK_ARM11

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@ -34,7 +34,7 @@ extern "C" {
#define HW_AXI_WRAM_SYSRV_OFS_INTR_VENEER 0x00 #define HW_AXI_WRAM_SYSRV_OFS_INTR_VENEER 0x00
#define HW_AXI_WRAM_SYSRV_OFS_FIQ_VENEER 0x08 #define HW_AXI_WRAM_SYSRV_OFS_FIQ_VENEER 0x08
#define HW_AXI_WRAM_SYSRV_OFS_SWI_VENEER 0x10 #define HW_AXI_WRAM_SYSRV_OFS_SWI_VENEER 0x10
#define HW_AXI_WRAM_SYSRV_OFS_UDEF_VENEER 0x18 #define HW_AXI_WRAM_SYSRV_OFS_UNDEF_VENEER 0x18
#define HW_AXI_WRAM_SYSRV_OFS_IABT_VENEER 0x20 #define HW_AXI_WRAM_SYSRV_OFS_IABT_VENEER 0x20
#define HW_AXI_WRAM_SYSRV_OFS_DABT_VENEER 0x28 #define HW_AXI_WRAM_SYSRV_OFS_DABT_VENEER 0x28
#endif // SDK_ARM11 #endif // SDK_ARM11
@ -57,8 +57,8 @@ extern "C" {
#define HW_FIQ_VECTOR_BUF (HW_FIQ_VENEER_BUF + 4) #define HW_FIQ_VECTOR_BUF (HW_FIQ_VENEER_BUF + 4)
#define HW_SWI_VENEER_BUF (HW_AXI_WRAM_SYSRV + HW_AXI_WRAM_SYSRV_OFS_SWI_VENEER) #define HW_SWI_VENEER_BUF (HW_AXI_WRAM_SYSRV + HW_AXI_WRAM_SYSRV_OFS_SWI_VENEER)
#define HW_SWI_VECTOR_BUF (HW_SWI_VENEER_BUF + 4) #define HW_SWI_VECTOR_BUF (HW_SWI_VENEER_BUF + 4)
#define HW_UDEF_VENEER_BUF (HW_AXI_WRAM_SYSRV + HW_AXI_WRAM_SYSRV_OFS_UDEF_VENEER) #define HW_UNDEF_VENEER_BUF (HW_AXI_WRAM_SYSRV + HW_AXI_WRAM_SYSRV_OFS_UNDEF_VENEER)
#define HW_UDEF_VECTOR_BUF (HW_UDEF_VENEER_BUF + 4) #define HW_UNDEF_VECTOR_BUF (HW_UNDEF_VENEER_BUF + 4)
#define HW_IABT_VENEER_BUF (HW_AXI_WRAM_SYSRV + HW_AXI_WRAM_SYSRV_OFS_IABT_VENEER) #define HW_IABT_VENEER_BUF (HW_AXI_WRAM_SYSRV + HW_AXI_WRAM_SYSRV_OFS_IABT_VENEER)
#define HW_IABT_VECTOR_BUF (HW_IABT_VENEER_BUF + 4) #define HW_IABT_VECTOR_BUF (HW_IABT_VENEER_BUF + 4)
#define HW_DABT_VENEER_BUF (HW_AXI_WRAM_SYSRV + HW_AXI_WRAM_SYSRV_OFS_DABT_VENEER) #define HW_DABT_VENEER_BUF (HW_AXI_WRAM_SYSRV + HW_AXI_WRAM_SYSRV_OFS_DABT_VENEER)

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@ -32,7 +32,7 @@ extern "C" {
#define HW_PRV_WRAM_SYSRV_OFS_INTR_VENEER 0x00 #define HW_PRV_WRAM_SYSRV_OFS_INTR_VENEER 0x00
#define HW_PRV_WRAM_SYSRV_OFS_FIQ_VENEER 0x08 #define HW_PRV_WRAM_SYSRV_OFS_FIQ_VENEER 0x08
#define HW_PRV_WRAM_SYSRV_OFS_SWI_VENEER 0x10 #define HW_PRV_WRAM_SYSRV_OFS_SWI_VENEER 0x10
#define HW_PRV_WRAM_SYSRV_OFS_UDEF_VENEER 0x18 #define HW_PRV_WRAM_SYSRV_OFS_UNDEF_VENEER 0x18
#define HW_PRV_WRAM_SYSRV_OFS_IABT_VENEER 0x20 #define HW_PRV_WRAM_SYSRV_OFS_IABT_VENEER 0x20
#define HW_PRV_WRAM_SYSRV_OFS_DABT_VENEER 0x28 #define HW_PRV_WRAM_SYSRV_OFS_DABT_VENEER 0x28
#define HW_PRV_WRAM_SYSRV_OFS_INTR_CHECK 0x3c #define HW_PRV_WRAM_SYSRV_OFS_INTR_CHECK 0x3c
@ -47,8 +47,8 @@ extern "C" {
#define HW_FIQ_VECTOR_BUF (HW_FIQ_VENEER_BUF + 4) #define HW_FIQ_VECTOR_BUF (HW_FIQ_VENEER_BUF + 4)
#define HW_SWI_VENEER_BUF (HW_PRV_WRAM_SYSRV + HW_PRV_WRAM_SYSRV_OFS_SWI_VENEER) #define HW_SWI_VENEER_BUF (HW_PRV_WRAM_SYSRV + HW_PRV_WRAM_SYSRV_OFS_SWI_VENEER)
#define HW_SWI_VECTOR_BUF (HW_SWI_VENEER_BUF + 4) #define HW_SWI_VECTOR_BUF (HW_SWI_VENEER_BUF + 4)
#define HW_UDEF_VENEER_BUF (HW_PRV_WRAM_SYSRV + HW_PRV_WRAM_SYSRV_OFS_UDEF_VENEER) #define HW_UNDEF_VENEER_BUF (HW_PRV_WRAM_SYSRV + HW_PRV_WRAM_SYSRV_OFS_UNDEF_VENEER)
#define HW_UDEF_VECTOR_BUF (HW_UDEF_VENEER_BUF + 4) #define HW_UNDEF_VECTOR_BUF (HW_UNDEF_VENEER_BUF + 4)
#define HW_IABT_VENEER_BUF (HW_PRV_WRAM_SYSRV + HW_PRV_WRAM_SYSRV_OFS_IABT_VENEER) #define HW_IABT_VENEER_BUF (HW_PRV_WRAM_SYSRV + HW_PRV_WRAM_SYSRV_OFS_IABT_VENEER)
#define HW_IABT_VECTOR_BUF (HW_IABT_VENEER_BUF + 4) #define HW_IABT_VECTOR_BUF (HW_IABT_VENEER_BUF + 4)
#define HW_DABT_VENEER_BUF (HW_PRV_WRAM_SYSRV + HW_PRV_WRAM_SYSRV_OFS_DABT_VENEER) #define HW_DABT_VENEER_BUF (HW_PRV_WRAM_SYSRV + HW_PRV_WRAM_SYSRV_OFS_DABT_VENEER)

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@ -45,7 +45,7 @@ extern "C" {
#ifdef SDK_ARM11 #ifdef SDK_ARM11
#define HW_PSR_IMPRECISE_ABORT 0x00000100 // Imprecise Abort #define HW_PSR_IMPR_ABORT_DISABLE 0x00000100 // Imprecise Abort Disable
#define HW_PSR_DATA_LITTLE_ENDIAN 0x00000000 // Data Little Endian #define HW_PSR_DATA_LITTLE_ENDIAN 0x00000000 // Data Little Endian
#define HW_PSR_DATA_BIG_ENDIAN 0x00000200 // Data Big Endian #define HW_PSR_DATA_BIG_ENDIAN 0x00000200 // Data Big Endian