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https://github.com/rvtr/ctr_firmware.git
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Thumb-SWI命令に対応。
git-svn-id: file:///Volumes/Transfer/gigaleak_20231201/2020-09-30%20-%20paladin.7z/paladin/ctr_firmware@223 b871894f-2f95-9b40-918c-086798483c85
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906a7c49ee
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bad2d57a2f
@ -42,11 +42,11 @@ LSYM(0)
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#ifdef SDK_ARM11
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#ifdef SDK_ARM11
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// disable VFP
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// disable VFP
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#ifndef SDK_NE1EMU
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#ifdef SDK_MG20EMU
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fmrx r12, fpexc
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fmrx r12, fpexc
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bic r12, r12, #HW_FPEXC_VFP_ENABLE
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bic r12, r12, #HW_FPEXC_VFP_ENABLE
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fmxr fpexc, r12
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fmxr fpexc, r12
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#endif // SDK_NE1EMU
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#endif // SDK_MG20EMU
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#endif // SDK_ARM11
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#endif // SDK_ARM11
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bx lr
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bx lr
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@ -171,7 +171,7 @@ asm void i_stupSwiVeneer( void )
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*---------------------------------------------------------------------------*/
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*---------------------------------------------------------------------------*/
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asm void i_stupUndefVeneer( void )
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asm void i_stupUndefVeneer( void )
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{
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{
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ldr pc, =HW_UDEF_VENEER_BUF
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ldr pc, =HW_UNDEF_VENEER_BUF
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LTORG
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LTORG
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}
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}
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@ -239,15 +239,16 @@ asm void i_stupSwiHandler( void )
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{
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{
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INASM_EXTERN( _start )
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INASM_EXTERN( _start )
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// 不正確データアボート有効化(clear HW_PSR_IMPRECISE_ABORT)
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// 不正確データアボート有効化(clear HW_PSR_IMPR_ABORT_DISABLE)
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// FIQハンドラでのSWI使用時のSP_svc上書き防止のため最初にFIQを禁止(IRQはHWが禁止する)
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// FIQハンドラでのSWI使用時のSP_svc上書き防止のため最初にFIQを禁止(IRQはHWが禁止する)
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msr cpsr_cxsf, #(HW_PSR_SVC_MODE | HW_PSR_IRQ_DISABLE | HW_PSR_FIQ_DISABLE)
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msr cpsr_cxsf, #(HW_PSR_SVC_MODE | HW_PSR_IRQ_DISABLE | HW_PSR_FIQ_DISABLE)
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// SVCモード
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// SVCモード
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mrs sp, spsr
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mrs sp, spsr // ※SP_svc
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and sp, #HW_PSR_CPU_MODE_MASK
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// ユーザモードならシステムモードへ
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// ユーザモードならシステムモードへ
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tst sp, #HW_PSR_SYS_MODE ^ HW_PSR_USR_MODE
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cmp sp, #HW_PSR_USR_MODE
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orreq sp, sp, #HW_PSR_SYS_MODE
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moveq sp, #HW_PSR_SYS_MODE
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// 割り込み禁止
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// 割り込み禁止
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orr sp, sp, #(HW_PSR_IRQ_DISABLE | HW_PSR_FIQ_DISABLE)
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orr sp, sp, #(HW_PSR_IRQ_DISABLE | HW_PSR_FIQ_DISABLE)
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msr cpsr_cxsf, sp
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msr cpsr_cxsf, sp
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@ -263,10 +264,11 @@ asm void i_stupSwiHandler( void )
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mov r12, lr
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mov r12, lr
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mrs r11, spsr
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mrs r11, spsr
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stmfd sp!, {r11, lr} // SPSR_svc、LR_svcを退避
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stmfd sp!, {r11, lr} // SPSR_svc、LR_svcを退避
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// 割り込み状態継承
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and r11, r11, #(HW_PSR_CPU_MODE_MASK | HW_PSR_IRQ_DISABLE | HW_PSR_FIQ_DISABLE)
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// ユーザモードならシステムモードへ
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// ユーザモードならシステムモードへ
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tst r11, #HW_PSR_SYS_MODE ^ HW_PSR_USR_MODE
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tst r11, #HW_PSR_SYS_MODE ^ HW_PSR_USR_MODE
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orreq r11, r11, #HW_PSR_SYS_MODE
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orreq r11, r11, #HW_PSR_SYS_MODE
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// 割り込み状態継承
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msr cpsr_cxsf, r11
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msr cpsr_cxsf, r11
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// 呼び出し元のモード
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// 呼び出し元のモード
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@ -38,7 +38,7 @@ void osInitException( void )
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{
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{
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isInit = TRUE;
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isInit = TRUE;
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*(OSExcpHandler*)HW_UDEF_VECTOR_BUF = i_osUndefInstHandler;
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*(OSExcpHandler*)HW_UNDEF_VECTOR_BUF = i_osUndefInstHandler;
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}
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}
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#endif // SDK_ARM11
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#endif // SDK_ARM11
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}
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}
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@ -49,7 +49,7 @@ asm void osIrqHandler( void )
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EXPORT i_osIrqHandlerReturn
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EXPORT i_osIrqHandlerReturn
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#ifdef SDK_ARM11
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#ifdef SDK_ARM11
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// 不正確データアボート有効化(clear HW_PSR_IMPRECISE_ABORT)
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// 不正確データアボート有効化(clear HW_PSR_IMPR_ABORT_DISABLE)
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msr cpsr_fsxc, #(HW_PSR_IRQ_MODE | HW_PSR_IRQ_DISABLE | HW_PSR_FIQ_DISABLE)
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msr cpsr_fsxc, #(HW_PSR_IRQ_MODE | HW_PSR_IRQ_DISABLE | HW_PSR_FIQ_DISABLE)
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#endif // SDK_ARM11
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#endif // SDK_ARM11
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@ -34,7 +34,7 @@ extern "C" {
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#define HW_AXI_WRAM_SYSRV_OFS_INTR_VENEER 0x00
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#define HW_AXI_WRAM_SYSRV_OFS_INTR_VENEER 0x00
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#define HW_AXI_WRAM_SYSRV_OFS_FIQ_VENEER 0x08
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#define HW_AXI_WRAM_SYSRV_OFS_FIQ_VENEER 0x08
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#define HW_AXI_WRAM_SYSRV_OFS_SWI_VENEER 0x10
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#define HW_AXI_WRAM_SYSRV_OFS_SWI_VENEER 0x10
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#define HW_AXI_WRAM_SYSRV_OFS_UDEF_VENEER 0x18
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#define HW_AXI_WRAM_SYSRV_OFS_UNDEF_VENEER 0x18
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#define HW_AXI_WRAM_SYSRV_OFS_IABT_VENEER 0x20
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#define HW_AXI_WRAM_SYSRV_OFS_IABT_VENEER 0x20
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#define HW_AXI_WRAM_SYSRV_OFS_DABT_VENEER 0x28
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#define HW_AXI_WRAM_SYSRV_OFS_DABT_VENEER 0x28
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#endif // SDK_ARM11
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#endif // SDK_ARM11
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@ -57,8 +57,8 @@ extern "C" {
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#define HW_FIQ_VECTOR_BUF (HW_FIQ_VENEER_BUF + 4)
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#define HW_FIQ_VECTOR_BUF (HW_FIQ_VENEER_BUF + 4)
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#define HW_SWI_VENEER_BUF (HW_AXI_WRAM_SYSRV + HW_AXI_WRAM_SYSRV_OFS_SWI_VENEER)
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#define HW_SWI_VENEER_BUF (HW_AXI_WRAM_SYSRV + HW_AXI_WRAM_SYSRV_OFS_SWI_VENEER)
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#define HW_SWI_VECTOR_BUF (HW_SWI_VENEER_BUF + 4)
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#define HW_SWI_VECTOR_BUF (HW_SWI_VENEER_BUF + 4)
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#define HW_UDEF_VENEER_BUF (HW_AXI_WRAM_SYSRV + HW_AXI_WRAM_SYSRV_OFS_UDEF_VENEER)
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#define HW_UNDEF_VENEER_BUF (HW_AXI_WRAM_SYSRV + HW_AXI_WRAM_SYSRV_OFS_UNDEF_VENEER)
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#define HW_UDEF_VECTOR_BUF (HW_UDEF_VENEER_BUF + 4)
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#define HW_UNDEF_VECTOR_BUF (HW_UNDEF_VENEER_BUF + 4)
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#define HW_IABT_VENEER_BUF (HW_AXI_WRAM_SYSRV + HW_AXI_WRAM_SYSRV_OFS_IABT_VENEER)
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#define HW_IABT_VENEER_BUF (HW_AXI_WRAM_SYSRV + HW_AXI_WRAM_SYSRV_OFS_IABT_VENEER)
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#define HW_IABT_VECTOR_BUF (HW_IABT_VENEER_BUF + 4)
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#define HW_IABT_VECTOR_BUF (HW_IABT_VENEER_BUF + 4)
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#define HW_DABT_VENEER_BUF (HW_AXI_WRAM_SYSRV + HW_AXI_WRAM_SYSRV_OFS_DABT_VENEER)
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#define HW_DABT_VENEER_BUF (HW_AXI_WRAM_SYSRV + HW_AXI_WRAM_SYSRV_OFS_DABT_VENEER)
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@ -32,7 +32,7 @@ extern "C" {
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#define HW_PRV_WRAM_SYSRV_OFS_INTR_VENEER 0x00
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#define HW_PRV_WRAM_SYSRV_OFS_INTR_VENEER 0x00
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#define HW_PRV_WRAM_SYSRV_OFS_FIQ_VENEER 0x08
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#define HW_PRV_WRAM_SYSRV_OFS_FIQ_VENEER 0x08
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#define HW_PRV_WRAM_SYSRV_OFS_SWI_VENEER 0x10
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#define HW_PRV_WRAM_SYSRV_OFS_SWI_VENEER 0x10
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#define HW_PRV_WRAM_SYSRV_OFS_UDEF_VENEER 0x18
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#define HW_PRV_WRAM_SYSRV_OFS_UNDEF_VENEER 0x18
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#define HW_PRV_WRAM_SYSRV_OFS_IABT_VENEER 0x20
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#define HW_PRV_WRAM_SYSRV_OFS_IABT_VENEER 0x20
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#define HW_PRV_WRAM_SYSRV_OFS_DABT_VENEER 0x28
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#define HW_PRV_WRAM_SYSRV_OFS_DABT_VENEER 0x28
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#define HW_PRV_WRAM_SYSRV_OFS_INTR_CHECK 0x3c
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#define HW_PRV_WRAM_SYSRV_OFS_INTR_CHECK 0x3c
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@ -47,8 +47,8 @@ extern "C" {
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#define HW_FIQ_VECTOR_BUF (HW_FIQ_VENEER_BUF + 4)
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#define HW_FIQ_VECTOR_BUF (HW_FIQ_VENEER_BUF + 4)
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#define HW_SWI_VENEER_BUF (HW_PRV_WRAM_SYSRV + HW_PRV_WRAM_SYSRV_OFS_SWI_VENEER)
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#define HW_SWI_VENEER_BUF (HW_PRV_WRAM_SYSRV + HW_PRV_WRAM_SYSRV_OFS_SWI_VENEER)
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#define HW_SWI_VECTOR_BUF (HW_SWI_VENEER_BUF + 4)
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#define HW_SWI_VECTOR_BUF (HW_SWI_VENEER_BUF + 4)
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#define HW_UDEF_VENEER_BUF (HW_PRV_WRAM_SYSRV + HW_PRV_WRAM_SYSRV_OFS_UDEF_VENEER)
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#define HW_UNDEF_VENEER_BUF (HW_PRV_WRAM_SYSRV + HW_PRV_WRAM_SYSRV_OFS_UNDEF_VENEER)
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#define HW_UDEF_VECTOR_BUF (HW_UDEF_VENEER_BUF + 4)
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#define HW_UNDEF_VECTOR_BUF (HW_UNDEF_VENEER_BUF + 4)
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#define HW_IABT_VENEER_BUF (HW_PRV_WRAM_SYSRV + HW_PRV_WRAM_SYSRV_OFS_IABT_VENEER)
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#define HW_IABT_VENEER_BUF (HW_PRV_WRAM_SYSRV + HW_PRV_WRAM_SYSRV_OFS_IABT_VENEER)
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#define HW_IABT_VECTOR_BUF (HW_IABT_VENEER_BUF + 4)
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#define HW_IABT_VECTOR_BUF (HW_IABT_VENEER_BUF + 4)
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#define HW_DABT_VENEER_BUF (HW_PRV_WRAM_SYSRV + HW_PRV_WRAM_SYSRV_OFS_DABT_VENEER)
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#define HW_DABT_VENEER_BUF (HW_PRV_WRAM_SYSRV + HW_PRV_WRAM_SYSRV_OFS_DABT_VENEER)
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@ -45,7 +45,7 @@ extern "C" {
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#ifdef SDK_ARM11
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#ifdef SDK_ARM11
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#define HW_PSR_IMPRECISE_ABORT 0x00000100 // Imprecise Abort
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#define HW_PSR_IMPR_ABORT_DISABLE 0x00000100 // Imprecise Abort Disable
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#define HW_PSR_DATA_LITTLE_ENDIAN 0x00000000 // Data Little Endian
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#define HW_PSR_DATA_LITTLE_ENDIAN 0x00000000 // Data Little Endian
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#define HW_PSR_DATA_BIG_ENDIAN 0x00000200 // Data Big Endian
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#define HW_PSR_DATA_BIG_ENDIAN 0x00000200 // Data Big Endian
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