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BROM_PLATFORMへMG20EMUを追加しデフォルトへ。

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git-svn-id: file:///Volumes/Transfer/gigaleak_20231201/2020-09-30%20-%20paladin.7z/paladin/ctr_firmware@80 b871894f-2f95-9b40-918c-086798483c85
This commit is contained in:
nakasima 2008-12-05 02:50:37 +00:00
parent daa1874bd7
commit 8d8535e069
8 changed files with 79 additions and 19 deletions
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8
trunk/bootrom/build/buildtools/commondefs
View File

@ -37,7 +37,7 @@ EXO_PLATFORM ?= $(BROM_PLATFORM)
#
# CodeGen Target
#
# BROM_PLATFORM = [TEG/TS]
# BROM_PLATFORM = [TS/TEG/MG20EMU]
# BROM_MEMSIZE = [64M/128M]
# BROM_CODEGEN = [ARM/THUMB]
# BROM_PROC = [ARM11/ARM9]
@ -46,7 +46,7 @@ EXO_PLATFORM ?= $(BROM_PLATFORM)
# BROM_TARGET = [BROM/NORFIRM/NANDFIRM/GCDFIRM/APP]
#
BROM_PLATFORM ?= TEG
BROM_PLATFORM ?= MG20EMU
BROM_MEMSIZE ?= 128M
BROM_CODEGEN ?= THUMB
BROM_PROC ?= ARM11
@ -191,7 +191,7 @@ BROM_LIBSUFFIX := .brom$(BROM_CODEGEN_ARCH)
BROM_SPECDIR := $(BROM_INCDIR)/brom/specfiles
BROM_SPECARCH := $(BROM_LIBARCH)
BROM_SPECARCH := $(CODEGEN_PROC)
ifneq ($(BROM_TARGET),BROM)
BROM_SPECARCH := $(BROM_SPECARCH)-$(BROM_TARGET)
endif
@ -203,7 +203,7 @@ else # BROM_PROMGEN
DEFAULT_BROM_LCFILE_TEMPLATE := $(BROM_SPECDIR)/PROM.ldscript.template
DEFAULT_BROM_LCFILE_SPEC := $(BROM_SPECDIR)/PROM.lsf
endif # BROM_PROMGEN
DEFAULT_BROM_ROM_SPEC := $(BROM_SPECDIR)/ROM-$(CTR_PLATFORM).rsf
DEFAULT_BROM_ROM_SPEC := $(BROM_SPECDIR)/ROM-$(TWL_PLATFORM).rsf
BROM_LCF_MAPHDRS := $(BROM_INCDIR)/brom/hw/$(BROM_PROC)/mmap_brom.h \
$(BROM_CTRFIRM_INCDIR)/ctr/hw/$(BROM_PROC)/mmap_global.h \

13
trunk/bootrom/build/libraries/init/ARM11/crt0_secure.c
View File

@ -107,7 +107,6 @@ ASM void stupDisableCP15( void )
| HW_C1_FORCE_AP_BIT \
| HW_C1_TEX_CB_REMAP \
| HW_C1_NMFI_FIQ \
| HW_C1_EXCEPT_VEC_UPPER \
| HW_C1_EXCEPT_BIG_ENDIAN \
| HW_C1_BR_PREDICT_ENABLE \
| HW_C1_LD_INTERWORK_DISABLE \
@ -116,6 +115,9 @@ ASM void stupDisableCP15( void )
| HW_C1_ROM_PROTECT_ENABLE \
| HW_C1_MMU_PROTECT_ENABLE \
| HW_C1_MMU_ENABLE
#ifndef SDK_MG20EMU
orr r1, r1, #HW_C1_EXCEPT_VEC_UPPER
#endif // SDK_MG20EMU
bic r0, r0, r1
mcr p15, 0, r0, c1, c0, 0
@ -179,6 +181,9 @@ ASM void stupEnableCP15( void )
| HW_C1_IC_ENABLE \
| HW_C1_DC_ENABLE \
| HW_C1_MMU_ENABLE
#ifdef SDK_MG20EMU
orr r1, r1, #HW_C1_EXCEPT_VEC_UPPER
#endif // SDK_MG20EMU
orr r0, r0, r1
@ -327,12 +332,12 @@ void stupInitMMUTable( void )
// BROM Region (64KBx2 cached)
table = &t1Base[HW_BIOS_IMG/HW_MMU6_T1_SEC_SIZE];
paddr = HW_BIOS_IMG;
table = &t1Base[HW_BROM_IMG/HW_MMU6_T1_SEC_SIZE];
paddr = HW_BROM_IMG;
*table = HW_MMU6_T1_COURSE_PACK( paddr, 0 );
// T2 for Page
table = &t2Base[0];
for ( paddr = HW_BIOS_IMG; paddr < HW_BROM_END; )
for ( paddr = HW_BROM_IMG; paddr != HW_BROM_END; )
{
*table++ = HW_MMU6_T2_LP_PACK(
paddr,

2
trunk/bootrom/include/brom/hw/ARM11/mmap_brom.h
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@ -28,7 +28,7 @@ extern "C" {
#endif
//------------------------------------- BROM
#define HW_BROM_IMG 0x00000000
#define HW_BROM_IMG HW_BIOS_IMG
#define HW_BROM HW_BIOS
#define HW_BROM_END (HW_BROM + HW_BROM_SIZE)
#define HW_BROM_SIZE 0x10000 // 64KB

0
trunk/bootrom/include/brom/specfiles/ARM11-TEG.ldscript.template → trunk/bootrom/include/brom/specfiles/ARM11.ldscript.template
View File

0
trunk/bootrom/include/brom/specfiles/ARM9-TEG.ldscript.template → trunk/bootrom/include/brom/specfiles/ARM9.ldscript.template
View File

4
trunk/build/buildtools/commondefs
View File

@ -34,13 +34,13 @@ CTRSDK_VERSION_MAJOR ?= 4
#
# CodeGen Target
#
# CTR_PLATFORM = [TEG/TS]
# CTR_PLATFORM = [TS/TEG/MG20EMU]
# CTR_MEMSIZE = [64M/128M]
# CTR_CODEGEN = [ARM/THUMB]
# CTR_PROC = [ARM11/ARM9/ARM7]
#
CTR_PLATFORM ?= TS
CTR_PLATFORM ?= TS
CTR_MEMSIZE ?= 64M
CTR_CODEGEN ?= ARM
CTR_PROC ?= ARM11

31
trunk/include/ctr/hw/ARM11/mmap_global.h
View File

@ -33,12 +33,13 @@ extern "C" {
#define HW_MAIN_MEM_SIZE 0x04000000 // 64MB
#define HW_MAIN_MEM_EX_SIZE 0x08000000 // 128MB
#ifndef SDK_MG20EMU
//----------------------------- AXI-WRAM
#define HW_AXI_WRAM 0x1ff80000
#define HW_AXI_WRAM_END (HW_AXI_WRAM + HW_AXI_WRAM_SIZE)
#define HW_AXI_WRAM_SIZE 0x80000 // 512KB
//----------------------------- DSP-WRAM (only DMAC2)
//----------------------------- DSP-WRAM
#define HW_DSP_WRAM 0x1ff00000
#define HW_DSP_WRAM_END (HW_DSP_WRAM + HW_DSP_WRAM_SIZE)
#define HW_DSP_WRAM_SIZE 0x80000 // 512KB
@ -48,6 +49,24 @@ extern "C" {
#define HW_VRAM_END (HW_VRAM + HW_VRAM_SIZE)
#define HW_VRAM_SIZE 0x400000 // 4MB
#else // SDK_MG20EMU
//----------------------------- AXI-WRAM
#define HW_AXI_WRAM 0x00100000
#define HW_AXI_WRAM_END (HW_AXI_WRAM + HW_AXI_WRAM_SIZE)
#define HW_AXI_WRAM_SIZE 0x1000 // 4KB
//----------------------------- DSP-WRAM
#define HW_DSP_WRAM HW_AXI_WRAM
#define HW_DSP_WRAM_END (HW_DSP_WRAM + HW_DSP_WRAM_SIZE)
#define HW_DSP_WRAM_SIZE 0 // 0B
//----------------------------- VRAM
#define HW_VRAM 0x1e000000
#define HW_VRAM_END (HW_VRAM + HW_VRAM_SIZE)
#define HW_VRAM_SIZE 0x400000 // 4MB
#endif // SDK_MG20EMU
//----------------------------- IOs
#define HW_IOREG 0x10000000
#define HW_IOREG_END 0x18000000
@ -57,7 +76,11 @@ extern "C" {
#define HW_APB_REG (HW_IOREG + 0x00200000)
#define HW_AHBML_REG (HW_IOREG + 0x00300000)
#define HW_GPU_REG (HW_IOREG + 0x00400000)
#ifndef SDK_MG20EMU
#define HW_MPCORE_REG (HW_IOREG + 0x07e00000)
#else // SDK_MG20EMU
#define HW_MPCORE_REG (HW_IOREG + 0xff000000)
#endif // SDK_MG20EMU
#define HW_AHBP_REG_END (HW_AHBP_REG + HW_AHBP_REG_SIZE)
#define HW_APB_REG_END (HW_APB_REG + HW_APB_REG_SIZE)
#define HW_AHBML_REG_END (HW_AHBML_REG + HW_AHBML_REG_SIZE)
@ -70,12 +93,16 @@ extern "C" {
#define HW_MPCORE_REG_SIZE 0x20000 // 128KB
//----------------------------- System ROM
#ifndef SDK_MG20EMU
#define HW_BIOS_IMG 0x00000000
#define HW_BIOS 0x00010000
#else // SDK_MG20EMU
#define HW_BIOS_IMG 0xffff0000
#define HW_BIOS 0xffff0000
#endif // SDK_MG20EMU
#define HW_BIOS_END (HW_BIOS + HW_BIOS_SIZE)
#define HW_BIOS_SIZE 0x8000 // 32KB
#define HW_RESET_VECTOR HW_BIOS
/*---------------------------------------------------------------------------*/
#ifdef __cplusplus

40
trunk/include/ctr/hw/ARM9/mmap_global.h
View File

@ -27,8 +27,7 @@ extern "C" {
*---------------------------------------------------------------------------*/
//----------------------------- ITCM
#define HW_ITCM_IMG 0x01000000
#define HW_ITCM 0x01ff8000
#define HW_ITCM 0x07ff8000
#define HW_ITCM_SIZE 0x8000 // 32KB
#define HW_ITCM_END (HW_ITCM + HW_ITCM_SIZE)
@ -45,6 +44,7 @@ extern "C" {
#define HW_MAIN_MEM_SIZE 0x04000000 // 64MB
#define HW_MAIN_MEM_EX_SIZE 0x08000000 // 128MB
#ifndef SDK_MG20EMU
//----------------------------- AXI-WRAM
#define HW_AXI_WRAM 0x1ff80000
#define HW_AXI_WRAM_END (HW_AXI_WRAM + HW_AXI_WRAM_SIZE)
@ -60,6 +60,25 @@ extern "C" {
#define HW_VRAM_END (HW_VRAM + HW_VRAM_SIZE)
#define HW_VRAM_SIZE 0x400000 // 4MB
#else // SDK_MG20EMU
//----------------------------- AXI-WRAM
#define HW_AXI_WRAM 0x00100000
#define HW_AXI_WRAM_END (HW_AXI_WRAM + HW_AXI_WRAM_SIZE)
#define HW_AXI_WRAM_SIZE 0x1000 // 4KB
//----------------------------- DSP-WRAM (only DMAC2)
#define HW_DSP_WRAM HW_AXI_WRAM
#define HW_DSP_WRAM_END (HW_DSP_WRAM + HW_DSP_WRAM_SIZE)
#define HW_DSP_WRAM_SIZE 0 // 0B
//----------------------------- VRAM
#define HW_VRAM 0x1e000000
#define HW_VRAM_END (HW_VRAM + HW_VRAM_SIZE)
#define HW_VRAM_SIZE 0x400000 // 4MB
#endif // SDK_MG20EMU
#ifndef SDK_MG20EMU
//----------------------------- Private WRAM
#define HW_PRV_WRAM 0x08000000
#define HW_PRV_WRAM_END (HW_PRV_WRAM + HW_PRV_WRAM_SIZE)
@ -70,6 +89,19 @@ extern "C" {
#define HW_IOREG_END 0x18000000
#define HW_REG_BASE HW_IOREG // alias
#else // SDK_MG20EMU
//----------------------------- Private WRAM
#define HW_PRV_WRAM 0x10000000
#define HW_PRV_WRAM_END (HW_PRV_WRAM + HW_PRV_WRAM_SIZE)
#define HW_PRV_WRAM_SIZE 0x100000 // 1MB
//----------------------------- IOs
#define HW_IOREG 0x08000000
#define HW_IOREG_END 0x10000000
#define HW_REG_BASE HW_IOREG // alias
#endif // SDK_MG20EMU
#define HW_PRV_REG (HW_IOREG + 0)
#define HW_AHBP_REG (HW_IOREG + 0x00100000)
#define HW_PRV_REG_END (HW_PRV_REG + HW_PRV_REG_SIZE)
@ -80,12 +112,8 @@ extern "C" {
//----------------------------- System ROM
#define HW_BIOS 0xffff0000
#define HW_BIOS_END (HW_BIOS + HW_BIOS_SIZE)
#define HW_BIOS_EX HW_BIOS_END
#define HW_BIOS_EX_END (HW_BIOS_EX + HW_BIOS_EX_SIZE)
#define HW_BIOS_SIZE 0x8000 // 32KB
#define HW_BIOS_EX_SIZE 0x10000 // 64KB
#define HW_RESET_VECTOR HW_BIOS
/*---------------------------------------------------------------------------*/
#ifdef __cplusplus