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https://github.com/rvtr/ctr_firmware.git
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アプリケーションのMMUテーブルとスタックをメインメモリへ移動。
git-svn-id: file:///Volumes/Transfer/gigaleak_20231201/2020-09-30%20-%20paladin.7z/paladin/ctr_firmware@250 b871894f-2f95-9b40-918c-086798483c85
This commit is contained in:
nakasima
parent
d258ddc83f
commit
847aa44731
@ -16,7 +16,7 @@
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*---------------------------------------------------------------------------*/
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#include <brom/code32.h>
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#include <brom/os.h>
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//#include <brom/mi.h>
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#include <app/memorymap.h>
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#undef BROM_TARGET_BROM
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#define BROM_TARGET_APP
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@ -43,26 +43,28 @@ asm void _start( void )
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// SVC mode
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mov r0, #HW_PSR_SVC_MODE | HW_PSR_IRQ_DISABLE | HW_PSR_FIQ_DISABLE
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msr cpsr_fsxc, r0
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ldr sp, =HW_BROM_SVC_STACK_END
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ldr sp, =HW_APP_SVC_STACK_END
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// IRQ mode
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mov r0, #HW_PSR_IRQ_MODE | HW_PSR_IRQ_DISABLE | HW_PSR_FIQ_DISABLE
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msr cpsr_fsxc, r0
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ldr r0, =HW_BROM_IRQ_STACK_END
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ldr r0, =HW_APP_IRQ_STACK_END
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mov sp, r0
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// System mode
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mov r0, #HW_PSR_SYS_MODE | HW_PSR_IRQ_DISABLE | HW_PSR_FIQ_DISABLE
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msr cpsr_fsxc, r0
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ldr r0, =HW_BROM_SYS_STACK_END
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ldr r0, =HW_APP_SYS_STACK_END
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mov sp, r0
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//---- disable cp15
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bl stupDisableCP15
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//---- initialize MMU
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ldr r0, =HW_BROM_MMU_T1
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ldr r1, =HW_BROM_MMU_T2
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ldr r0, =HW_APP_MMU_T1
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ldr r1, =HW_APP_MMU_T1_END
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ldr r2, =HW_APP_MMU_T2
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ldr r3, =HW_APP_MMU_T2_END
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bl stupInitMMU
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//---- enable cp15
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@ -62,7 +62,9 @@ asm void _start( void )
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//---- initialize MMU
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ldr r0, =HW_FIRM_MMU_T1
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ldr r1, =HW_FIRM_MMU_T2
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ldr r1, =HW_FIRM_MMU_T1_END
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ldr r2, =HW_FIRM_MMU_T2
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ldr r3, =HW_FIRM_MMU_T2_END
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bl stupInitMMU
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//---- enable cp15
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@ -17,7 +17,7 @@
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#include <brom/code32.h>
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#include <brom/os.h>
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void stupInitMMUTable( u32* t1Base, u32* t2Base );
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void stupInitMMUTable( u32* t1Base, u32* t1End, u32* t2Base, u32* t2End );
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/*---------------------------------------------------------------------------*
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Name: stupDisableCP15
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@ -145,41 +145,41 @@ asm void stupEnableCP15( void )
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Returns: None
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*---------------------------------------------------------------------------*/
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asm void stupInitMMU( u32* t1Base, u32* t2Base )
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asm void stupInitMMU( u32* t1Base, u32* t1End, u32* t2Base, u32* t2End )
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{
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stmfd sp!, {r4, lr} // stack requires 8byte alignment
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// Invalidate ITLB DTLB
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mov r3, #0
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mcr p15, 0, r3, c8, c5, 0
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mcr p15, 0, r3, c8, c6, 0
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mov r4, #0
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mcr p15, 0, r4, c8, c5, 0
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mcr p15, 0, r4, c8, c6, 0
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mov r2, #HW_C2_V5_T1_BOUNBARY_16KB
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mov r12, #HW_C2_V5_T1_BOUNBARY_16KB
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// MMU L1 Table Base
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ldr r3, =HW_C2_0_T1_BASE_MASK_MIN
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mov r3, r3, ASR r2
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and r3 ,r3, r0
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orr r3, r3, #(HW_C2_WALK_L2C_CA_NC << HW_C2_WALK_L2C_CA_SFT) \
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ldr r4, =HW_C2_0_T1_BASE_MASK_MIN
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mov r4, r4, ASR r12
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and r4 ,r4, r0
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orr r4, r4, #(HW_C2_WALK_L2C_CA_NC << HW_C2_WALK_L2C_CA_SFT) \
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| HW_C2_WALK_ON_SHARED_MEM
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mcr p15, 0, r3, c2, c0, 0
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mcr p15, 0, r4, c2, c0, 0
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ldr r3, =HW_C2_1_T1_BASE_MASK
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and r3 ,r3, r0
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orr r3, r3, #(HW_C2_WALK_L2C_CA_NC << HW_C2_WALK_L2C_CA_SFT) \
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ldr r4, =HW_C2_1_T1_BASE_MASK
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and r4 ,r4, r0
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orr r4, r4, #(HW_C2_WALK_L2C_CA_NC << HW_C2_WALK_L2C_CA_SFT) \
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| HW_C2_WALK_ON_SHARED_MEM
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mcr p15, 0, r3, c2, c0, 1
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mcr p15, 0, r4, c2, c0, 1
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// MMU L1 Table Boundary
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mcr p15, 0, r2, c2, c0, 2
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mcr p15, 0, r12, c2, c0, 2
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// Domain Access Permission
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#if 1 // miya
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ldr r3, =0x00000001
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ldr r4, =0x00000001
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#else
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ldr r3, = HW_C3_DOMAIN_PACK( \
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ldr r4, = HW_C3_DOMAIN_PACK( \
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HW_C3_DM_AP_CLIENT, \
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HW_C3_DM_AP_CLIENT, \
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HW_C3_DM_AP_CLIENT, \
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@ -200,13 +200,13 @@ asm void stupInitMMU( u32* t1Base, u32* t2Base )
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#endif
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mcr p15, 0, r3, c3, c0, 0
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mcr p15, 0, r4, c3, c0, 0
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// VFP Access Permission
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ldr r3, =HW_C1_VFP_AP_PACK( \
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ldr r4, =HW_C1_VFP_AP_PACK( \
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HW_C1_AP_PRIV, HW_C1_AP_PRIV )
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mcr p15, 0, r3, c1, c0, 2
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mcr p15, 0, r4, c1, c0, 2
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// Initialize MMU Table
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@ -225,14 +225,14 @@ asm void stupInitMMU( u32* t1Base, u32* t2Base )
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Returns: None
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*---------------------------------------------------------------------------*/
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void stupInitMMUTable( u32* t1Base, u32* t2Base )
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void stupInitMMUTable( u32* t1Base, u32* t1End, u32* t2Base, u32* t2End )
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{
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u32* table;
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u32 paddr = (u32 )NULL;
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// Initialize as Access Prohibition
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table = t1Base;
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for ( paddr = (u32 )NULL; table < (void *)HW_BROM_MMU_T1_END; )
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for ( paddr = (u32 )NULL; table < t1End; )
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{
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*table++ = HW_MMU6_T1_SEC_PACK(
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paddr,
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@ -245,7 +245,7 @@ void stupInitMMUTable( u32* t1Base, u32* t2Base )
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}
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table = t2Base;
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for ( paddr = (u32 )NULL; table < (void *)HW_BROM_MMU_T2_END; )
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for ( paddr = (u32 )NULL; table < t2End; )
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{
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*table++ = HW_MMU6_T2_SP_PACK(
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paddr,
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@ -70,7 +70,9 @@ image_to_physical
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//---- initialize MMU
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ldr r0, =HW_BROM_MMU_T1
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ldr r1, =HW_BROM_MMU_T2
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ldr r1, =HW_BROM_MMU_T1_END
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ldr r2, =HW_BROM_MMU_T2
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ldr r3, =HW_BROM_MMU_T2_END
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bl stupInitMMU
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//---- enable cp15
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65
trunk/bootrom/include/app/hw/ARM11/mmap_app.h
Normal file
65
trunk/bootrom/include/app/hw/ARM11/mmap_app.h
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@ -0,0 +1,65 @@
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/*---------------------------------------------------------------------------*
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Project: CtrBrom - HW - include
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File: mmap_app.h
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Copyright 2009 Nintendo. All rights reserved.
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These coded instructions, statements, and computer programs contain
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proprietary information of Nintendo of America Inc. and/or Nintendo
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Company Ltd., and are protected by Federal copyright law. They may
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not be disclosed to third parties or copied or duplicated in any form,
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in whole or in part, without the prior written consent of Nintendo.
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$Date:: $
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$Rev$
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$Author$
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*---------------------------------------------------------------------------*/
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#ifndef BROM_HW_ARM11_MMAP_APP_H_
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#define BROM_HW_ARM11_MMAP_APP_H_
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#include <brom/memorymap.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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//------------------------------------- HW_APP
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#define HW_APP HW_MAIN_MEM
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#define HW_APP_END HW_APP_STACK
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#define HW_APP_SIZE (HW_APP_STACK - HW_MAIN_MEM)
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//------------------------------------- HW_APP_STACK
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#define HW_APP_STACK (HW_APP_STACK_END - HW_APP_STACK_SIZE)
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#define HW_APP_STACK_END HW_APP_MMU_TBL
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#define HW_APP_STACK_SIZE 0x4000 // 16KB
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#define HW_APP_SVC_STACK (HW_APP_SVC_STACK_END - HW_APP_SVC_STACK_SIZE)
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#define HW_APP_SVC_STACK_END HW_APP_STACK_END
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#define HW_APP_SVC_STACK_SIZE 0x100 // 256B
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#define HW_APP_IRQ_STACK (HW_APP_IRQ_STACK_END - HW_APP_IRQ_STACK_SIZE)
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#define HW_APP_IRQ_STACK_END HW_APP_SVC_STACK
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#define HW_APP_IRQ_STACK_SIZE (0x1000 - HW_APP_SVC_STACK_SIZE) // 4KB - 256B
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#define HW_APP_SYS_STACK (HW_APP_SYS_STACK_END - HW_APP_SYS_STACK_SIZE)
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#define HW_APP_SYS_STACK_END HW_APP_IRQ_STACK
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#define HW_APP_SYS_STACK_SIZE (HW_APP_STACK_SIZE - HW_APP_IRQ_STACK_SIZE - HW_APP_SVC_STACK_SIZE) // 12KB
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//------------------------------------- HW_APP_MMU_TBL
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#define HW_APP_MMU_TBL (HW_APP_MMU_TBL_END - HW_APP_MMU_TBL_SIZE)
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#define HW_APP_MMU_TBL_END HW_MAIN_MEM_END
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#define HW_APP_MMU_TBL_SIZE (HW_APP_MMU_T1_SIZE + HW_APP_MMU_T2_SIZE) // 32KB
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#define HW_APP_MMU_T1 HW_APP_MMU_TBL
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#define HW_APP_MMU_T2 HW_APP_MMU_T1_END
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#define HW_APP_MMU_T1_END (HW_APP_MMU_T1 + HW_APP_MMU_T1_SIZE)
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#define HW_APP_MMU_T2_END (HW_APP_MMU_T2 + HW_APP_MMU_T2_SIZE)
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#define HW_APP_MMU_T1_SIZE 0x4000 // 16KB
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#define HW_APP_MMU_T2_SIZE 0x4000 // 16KB
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#ifdef __cplusplus
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} /* extern "C" */
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#endif
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/* BROM_HW_ARM11_MMAP_APP_H_ */
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#endif
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38
trunk/bootrom/include/app/memorymap.h
Normal file
38
trunk/bootrom/include/app/memorymap.h
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@ -0,0 +1,38 @@
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/*---------------------------------------------------------------------------*
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Project: CtrBrom - include - HW
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File: memorymap.h
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Copyright 2008 Nintendo. All rights reserved.
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These coded instructions, statements, and computer programs contain
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proprietary information of Nintendo of America Inc. and/or Nintendo
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Company Ltd., and are protected by Federal copyright law. They may
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not be disclosed to third parties or copied or duplicated in any form,
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in whole or in part, without the prior written consent of Nintendo.
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$Date:: $
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$Rev$
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$Author$
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*---------------------------------------------------------------------------*/
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#ifndef APP_MEMORYMAP_H_
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#define APP_MEMORYMAP_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <brom/memorymap.h>
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#ifdef SDK_ARM11
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#include <app/hw/ARM11/mmap_app.h>
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#else //SDK_ARM9
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#include <app/hw/ARM9/mmap_app.h>
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#endif
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#ifdef __cplusplus
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} /* extern "C" */
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#endif
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/* APP_MEMORYMAP_H_ */
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#endif
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23
trunk/bootrom/include/app/memorymap_sp.h
Normal file
23
trunk/bootrom/include/app/memorymap_sp.h
Normal file
@ -0,0 +1,23 @@
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/*---------------------------------------------------------------------------*
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Project: CtrBrom - include - HW
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File: memorymap_sp.h
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Copyright 2009 Nintendo. All rights reserved.
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These coded instructions, statements, and computer programs contain
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proprietary information of Nintendo of America Inc. and/or Nintendo
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Company Ltd., and are protected by Federal copyright law. They may
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not be disclosed to third parties or copied or duplicated in any form,
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in whole or in part, without the prior written consent of Nintendo.
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$Date:: $
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$Rev$
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$Author$
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*---------------------------------------------------------------------------*/
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#ifndef SDK_ARM9
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#define SDK_ARM9
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#endif
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#ifdef SDK_ARM11
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#undef SDK_ARM11
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#endif
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#include <app/memorymap.h>
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@ -27,25 +27,15 @@
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extern "C" {
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#endif
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//#define BROM_TARGET_PHASE1
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//------------------------------------- BROM
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#define HW_BROM_IMG HW_BIOS_IMG
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#define HW_BROM HW_BIOS
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#define HW_BROM_END (HW_BROM + HW_BROM_SIZE)
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#ifdef BROM_TARGET_PHASE1
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#define HW_BROM_SIZE 0x8000 // 32KB
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#else // BROM_TARGET_PHASE1
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#define HW_BROM_SIZE 0x10000 // 64KB
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#endif // BROM_TARGET_PHASE1
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#define HW_BROM_NML HW_BROM
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#define HW_BROM_NML_END (HW_BROM_NML + HW_BROM_NML_SIZE)
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#ifdef BROM_TARGET_PHASE1
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#define HW_BROM_NML_SIZE 0x4000 // 16KB
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#else // BROM_TARGET_PHASE1
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#define HW_BROM_NML_SIZE 0x8000 // 32KB
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#endif // BROM_TARGET_PHASE1
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#define HW_BROM_NML_ABT HW_BROM_NML
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#define HW_BROM_NML_ABT_END (HW_BROM_NML_ABT + HW_BROM_NML_ABT_SIZE)
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#define HW_BROM_NML_ABT_SIZE 0x1000 // 4KB
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@ -19,11 +19,7 @@
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//
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#define SDK_ASM
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#include <brom/hw/ARM11/mmap_brom.h>
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#define HW_APP HW_MAIN_MEM
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#define HW_APP_END (HW_APP + HW_APP_SIZE)
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#define HW_APP_SIZE HW_MAIN_MEM_SIZE
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#include <app/hw/ARM11/mmap_app.h>
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LOAD_STATIC HW_APP HW_APP_SIZE
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