mirror of
https://github.com/rvtr/ctr_firmware.git
synced 2025-10-31 07:51:08 -04:00
スタートアップのビルドが通る状態。
git-svn-id: file:///Volumes/Transfer/gigaleak_20231201/2020-09-30%20-%20paladin.7z/paladin/ctr_firmware@42 b871894f-2f95-9b40-918c-086798483c85
This commit is contained in:
nakasima
parent
89f91e6a66
commit
797b6c4db5
@ -29,8 +29,8 @@ BROM_PROC = ARM9
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SRCDIR = ../common .
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SRCS = crt0.c crt0_secure_sp.c crt0_scat.c crt0_app.c
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TARGET_OBJ = crt0.o crt0_secure_sp.o crt0_scat.o crt0_app.o
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SRCS = crt0.c crt0_secure_sp.c crt0_scat.c # crt0_app.c
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TARGET_OBJ = crt0.o crt0_secure_sp.o crt0_scat.o # crt0_app.o
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#----------------------------------------------------------------------------
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@ -15,7 +15,7 @@
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*---------------------------------------------------------------------------*/
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#include <brom/code32.h>
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#include <brom/os.h>
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#include <brom/mi.h>
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//#include <brom/mi.h>
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void _start(void);
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@ -54,9 +54,9 @@ asm void STUPi_StartHandler( void )
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#ifndef BROM_ENABLE_BOOTROM_WRITE
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ldr r3, =REG_DEVROM_ADDR
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ldr r3, =REG_ROM_ADDR
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ldrb r1, [r3]
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bic r1, #REG_CFG_DEVROM_WE_MASK
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bic r1, #REG_SCFG_ROM_WE_MASK
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strb r1, [r3]
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#endif // BROM_ENABLE_BOOTROM_WRITE
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@ -15,38 +15,9 @@
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*---------------------------------------------------------------------------*/
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#include <brom/code32.h>
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#include <brom/os.h>
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#include <brom/mi.h>
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//#include <brom/mi.h>
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/*---------------------------------------------------------------------------*
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Name: STUPi_MappingWram
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Description: mapping WRAM for ARM7
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Arguments: None
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Returns: None
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*---------------------------------------------------------------------------*/
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ASM void STUPi_MappingWram( void )
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{
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// mapping WRAM-A
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ldr r3, =REG_WRAM_A_MAP_ADDR
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ldr r1, =REG_WRAM_A_MAP_PACK( MI_WRAM_MAP_NULL, MI_WRAM_MAP_NULL, __cpp(MI_WRAM_A_IMG_MAX) )
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str r1, [r3]
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// mapping WRAM-B
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ldr r3, =REG_WRAM_B_MAP_ADDR
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ldr r1, =REG_WRAM_A_MAP_PACK( MI_WRAM_MAP_NULL, MI_WRAM_MAP_NULL, __cpp(MI_WRAM_A_IMG_MAX) )
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str r1, [r3]
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// mapping WRAM-C
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ldr r3, =REG_WRAM_C_MAP_ADDR
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ldr r1, =REG_WRAM_C_MAP_PACK( MI_WRAM_MAP_NULL, MI_WRAM_MAP_NULL, __cpp(MI_WRAM_A_IMG_MAX) )
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str r1, [r3]
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bx lr
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}
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/*---------------------------------------------------------------------------*
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Name: __user_initial_stackheap
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@ -178,7 +149,7 @@ LSYM(10)
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}
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/*---------------------------------------------------------------------------*
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Name: STUPi_NotifyToARM9
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Name: STUPi_NotifyToARM11
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Description: notify 4bit id to ARM9
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@ -186,30 +157,30 @@ LSYM(10)
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Returns: None
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*---------------------------------------------------------------------------*/
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ASM void STUPi_NotifyToARM9( u32 id )
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ASM void STUPi_NotifyToARM11( u32 id )
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{
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ldr r3, =REG_MAINPINTF_ADDR
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mov r0, r0, lsl #REG_PXI_MAINPINTF_A7STATUS_SHIFT
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and r0, r0, #REG_PXI_MAINPINTF_A7STATUS_MASK
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mov r0, r0, lsl #REG_PXI_MAINPINTF_A9STATUS_SHIFT
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and r0, r0, #REG_PXI_MAINPINTF_A9STATUS_MASK
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str r0, [r3]
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bx lr
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}
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/*---------------------------------------------------------------------------*
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Name: STUPi_WaitARM9
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Name: STUPi_WaitARM11
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Description: Wait 4bit id from ARM9
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Description: Wait 4bit id from ARM11
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Arguments: id waiting id
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Returns: None
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*---------------------------------------------------------------------------*/
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ASM void STUPi_WaitARM9( u32 id )
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ASM void STUPi_WaitARM11( u32 id )
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{
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ldr r3, =REG_MAINPINTF_ADDR
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LSYM(10)
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ldr r1, [r3]
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and r1, r1, #REG_PXI_MAINPINTF_A9STATUS_MASK
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and r1, r1, #REG_PXI_MAINPINTF_A11STATUS_MASK
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cmp r0, r1
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bne BSYM(10)
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bx lr
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@ -15,10 +15,9 @@
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*---------------------------------------------------------------------------*/
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#include <brom/code32.h>
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#include <brom/os.h>
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#include <brom/mi.h>
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//#include <brom/mi.h>
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//#define BROM_ENABLE_BOOTROM_WRITE
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//#define BROM_DISABLE_BOOTROM_PROT
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/*---------------------------------------------------------------------------*
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Name: STUPi_StartHandler
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@ -39,57 +38,39 @@ asm void STUPi_StartHandler( void )
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#ifndef BROM_ENABLE_BOOTROM_WRITE
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ldr r3, =REG_DEVROM_ADDR
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ldr r3, =REG_ROM_ADDR
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ldrb r1, [r3]
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bic r1, #REG_CFG_DEVROM_WE_MASK
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bic r1, #REG_SCFG_ROM_WE_MASK
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strb r1, [r3]
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#endif // BROM_ENABLE_BOOTROM_WRITE
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//---- set IME = 0
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// ( use that LSB of HW_REG_BASE equal to 0 )
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mov r12, #HW_REG_BASE
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str r12, [r12, #REG_IME_OFFSET]
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#ifndef BROM_DISABLE_BOOTROM_PROT
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// init BROM prot
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ldr r3, =REG_PROT_ADDR
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ldr r1, =4*8 // 0x1204
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strh r1, [r3]
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#endif // BROM_DISABLE_BOOTROM_PROT
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//---- initialize stack pointer
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// SVC mode
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mov r0, #HW_PSR_SVC_MODE
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msr cpsr_c, r0
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ldr sp, =HW_PRV_WRAM_SVC_STACK_END
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ldr sp, =HW_BROM_SVC_STACK_END
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// IRQ mode
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mov r0, #HW_PSR_IRQ_MODE
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msr cpsr_c, r0
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ldr r0, =HW_PRV_WRAM_IRQ_STACK_END
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ldr r0, =HW_BROM_IRQ_STACK_END
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mov sp, r0
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// System mode
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ldr r1, =HW_IRQ_STACK_SIZE
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sub r1, r0, r1
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mov r0, #HW_PSR_SYS_MODE
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msr cpsr_csfx, r0
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sub sp, r1, #4 // 4byte for stack check code
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ldr r0, =HW_BROM_SYS_STACK_END
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mov sp, r0
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//---- clear wram top
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//---- clear wram
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// 1KB
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mov r0, #0
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ldr r1, =HW_WRAM_AREA_END
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ldr r1, =HW_PRV_WRAM_END
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mov r2, #0x0400
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sub r1, r1, r2
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bl STUPi_CpuClear32
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//---- mapping WRAM for itself
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bl STUPi_MappingWram
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//---- lnitialize sections
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bl stupInitSections
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@ -27,58 +27,14 @@
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Returns: None.
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*---------------------------------------------------------------------------*/
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#ifdef SDK_ARM9
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#define BROM_EXCP_STACK_SIZE 16
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#else // SDK_ARM7
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#define BROM_EXCP_STACK_SIZE 12
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#endif // SDK_ARM7
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asm void STUPi_DbgHandler( void )
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{
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mrs sp, cpsr // IRQ/FIQ•s‹–‰Â
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orr sp, sp, #HW_PSR_IRQ_DISABLE | HW_PSR_FIQ_DISABLE
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msr cpsr_cxsf, sp
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#ifdef SDK_ARM9
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ldr sp, =HW_EXCP_VECTOR_MAIN
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#else // SDK_ARM7
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ldr sp, =HW_BROM_SYSRV_END - HW_BROM_SYSRV_IOFS_EXCP_VECTOR
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#endif // SDK_ARM7
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add sp, sp, #1
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fiq_m
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stmfd sp!, {r12, lr} // レジスタの退避（合計4ワード）
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mrs lr, spsr
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#ifdef SDK_ARM7
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stmfd sp!, {lr}
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#else // SDK_ARM9
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mrc p15, 0, r12, c1, c0, 0 // コプロセッサ・マスタ退避
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stmfd sp!, {r12, lr}
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bic r12, r12, #HW_C1_PROTECT_UNIT_ENABLE
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mcr p15, 0, r12, c1, c0, 0
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#endif // SDK_ARM9
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bic r12, sp, #1 // デバッガ処理へジャンプ
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ldr r12, [r12, #BROM_EXCP_STACK_SIZE]
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cmp r12, #0
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#ifdef SDK_ARM9
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blxne r12
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#else // SDK_ARM7
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adr lr, fiq_return
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bxne r12
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#endif // SDK_ARM7
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fiq_return
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#ifdef SDK_ARM9
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ldmfd sp!, {r12, lr}
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mcr p15, 0, r12, c1, c0, 0
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#else // SDK_ARM7
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ldmfd sp!, {lr}
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#endif // SDK_ARM7
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msr spsr_sxcf, lr
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ldmfd sp!, {r12, lr}
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subs pc, lr, #4
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dbg_m
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b dbg_m
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LTORG
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}
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@ -94,27 +50,15 @@ fiq_return
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*---------------------------------------------------------------------------*/
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asm void STUPi_IrqHandler( void )
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{
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stmfd sp!, {r0-r3,r12,lr} // レジスタの退避（6ワード）
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#ifdef SDK_ARM9
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mrc p15, 0, r0, c9, c1, 0 // DTCMƒAƒhƒŒƒXŠl“¾
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mov r0, r0, lsr #HW_C9_TCMR_BASE_SHIFT
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mov r0, r0, lsl #HW_C9_TCMR_BASE_SHIFT
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add r0, r0, #HW_DTCM_SIZE
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#endif // SDK_ARM9
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#else // SDK_ARM7
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#ifdef BROM_SYSRV_LOWVEC
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ldr r0, =HW_BROM_SYSRV_END
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#else // BROM_SYSRV_HIGHVEC
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mov r0, #HW_BROM_SYSRV_END
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#endif // BROM_SYSRV_HIGHVEC
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#endif // SDK_ARM7
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adr lr, irq_return
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ldr pc, [r0, #-HW_BROM_SYSRV_IOFS_INTR_VECTOR]
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irq_return
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ldmfd sp!, {r0-r3,r12,lr}
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subs pc, lr, #4
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irq_m
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b irq_m
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LTORG
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}
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@ -57,23 +57,30 @@ extern "C" {
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#define HW_BROM_TO_FIRM_BUF_SIZE HW_FIRM_FROM_BROM_BUF_SIZE // 12KB
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//------------------------------------- HW_BROM_STACK
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#define HW_BROM_STACK (HW_WRAM_AREA_END - 0x1000)
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#define HW_BROM_STACK_END HW_BROM_SYSRV
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#define HW_BROM_STACK_SIZE (HW_BROM_STACK_END - HW_BROM_STACK) // <20>à4KB
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#define HW_BROM_STACK (HW_BROM_STACK_END - HW_BROM_STACK_SIZE)
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#define HW_BROM_STACK_END HW_DTCM_END
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#define HW_BROM_STACK_SIZE HW_DTCM_SIZE // 16KB
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#define HW_BROM_SVC_STACK (HW_BROM_SVC_STACK_END - HW_BROM_SVC_STACK_SIZE)
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#define HW_BROM_SVC_STACK_END HW_BROM_STACK_END
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#define HW_BROM_SVC_STACK_SIZE 0x100 // 256B
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#define HW_BROM_IRQ_STACK (HW_BROM_SVC_STACK_END - HW_BROM_SVC_STACK_SIZE)
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#define HW_BROM_IRQ_STACK_END HW_BROM_SVC_STACK
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#define HW_BROM_IRQ_STACK_SIZE (0x1000 - HW_BROM_SVC_STACK_SIZE) // 4KB - 256B
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#define HW_BROM_SYS_STACK (HW_BROM_SYS_STACK_END - HW_BROM_SYS_STACK_SIZE)
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#define HW_BROM_SYS_STACK_END HW_BROM_IRQ_STACK
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#define HW_BROM_SYS_STACK_SIZE (HW_BROM_STACK_SIZE - HW_BROM_IRQ_STACK_SIZE - HW_BROM_SVC_STACK_SIZE) // 12KB
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//------------------------------------- BROM_SYSRV
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#ifdef BROM_SYSRV_LOWVEC
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#define HW_BROM_SYSRV HW_PRV_WRAM_SYSRV
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#define HW_BROM_SYSRV HW_PRV_WRAM
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#define HW_BROM_SYSRV_END (HW_BROM_SYSRV + HW_BROM_SYSRV_SIZE)
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#else // BROM_SYSRV_HIGHVEC
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#define HW_BROM_SYSRV (HW_BROM_SYSRV_END - HW_BROM_SYSRV_SIZE)
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#define HW_BROM_SYSRV_END HW_WRAM_AREA_END
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#endif
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#define HW_BROM_SYSRV_SIZE HW_PRV_WRAM_SYSRV_SIZE
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#define HW_BROM_SYSRV_SIZE 0x1000 // 4KB
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#define HW_BROM_SYSRV_IOFS_EXCP_VECTOR (HW_PRV_WRAM_SYSRV_SIZE - HW_PRV_WRAM_SYSRV_OFS_EXCP_VECTOR)
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#define HW_BROM_SYSRV_IOFS_INTR_CHECK (HW_PRV_WRAM_SYSRV_SIZE - HW_PRV_WRAM_SYSRV_OFS_INTR_CHECK)
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#define HW_BROM_SYSRV_IOFS_INTR_CHECK2 (HW_PRV_WRAM_SYSRV_SIZE - HW_PRV_WRAM_SYSRV_OFS_INTR_CHECK2)
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#define HW_BROM_SYSRV_IOFS_INTR_VECTOR (HW_PRV_WRAM_SYSRV_SIZE - HW_PRV_WRAM_SYSRV_OFS_INTR_VECTOR)
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//------------------------------------- BIOS_ENTRY
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@ -24,7 +24,8 @@ extern "C" {
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#include <brom/types.h>
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#include <brom/memorymap.h>
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#include <ctr/hw/common/arm_reg_common.h>
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#include <ctr/arm_reg.h>
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#include <ctr/os/common/svc.h>
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#include <brom/init/crt0.h>
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#if 0
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@ -17,16 +17,9 @@
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#ifndef BROM_TYPES_H_
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#define BROM_TYPES_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <brom/brom_defs.h>
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#include <brom/c_extension.h>
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#include <ctr/types.h>
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#ifdef __cplusplus
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} /* extern "C" */
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#endif
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/* BROM_TYPES_H_ */
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#endif
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21
trunk/include/ctr/arm_reg.h
Normal file
21
trunk/include/ctr/arm_reg.h
Normal file
@ -0,0 +1,21 @@
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/*---------------------------------------------------------------------------*
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Project: CtrFirm - include -
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File: ctr/arm_reg.h
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Copyright 2008 Nintendo. All rights reserved.
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These coded instructions, statements, and computer programs contain
|
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proprietary information of Nintendo of America Inc. and/or Nintendo
|
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Company Ltd., and are protected by Federal copyright law. They may
|
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not be disclosed to third parties or copied or duplicated in any form,
|
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in whole or in part, without the prior written consent of Nintendo.
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$Date:: 2008-11-28#$
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$Rev: 41 $
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$Author: nakasima $
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*---------------------------------------------------------------------------*/
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#ifdef SDK_ARM11
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#include <ctr/hw/ARM11/arm11_reg.h>
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#else //SDK_ARM9
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#include <ctr/hw/ARM9/arm9_reg.h>
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#endif
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200
trunk/include/ctr/hw/ARM9/arm9_reg.h
Normal file
200
trunk/include/ctr/hw/ARM9/arm9_reg.h
Normal file
@ -0,0 +1,200 @@
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/*---------------------------------------------------------------------------*
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Project: CtrFirm - HW - include
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File: armArch.h
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Copyright 2008 Nintendo. All rights reserved.
|
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|
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These coded instructions, statements, and computer programs contain
|
||||
proprietary information of Nintendo of America Inc. and/or Nintendo
|
||||
Company Ltd., and are protected by Federal copyright law. They may
|
||||
not be disclosed to third parties or copied or duplicated in any form,
|
||||
in whole or in part, without the prior written consent of Nintendo.
|
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|
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$Date:: 2008-11-28#$
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$Rev: 42 $
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$Author: nakasima $
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*---------------------------------------------------------------------------*/
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#ifndef CTR_HW_ARM9_REG_H_
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#define CTR_HW_ARM9_REG_H_
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#ifndef SDK_ASM
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#include <ctr/hw/common/arm_reg_common.h>
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#endif
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define HW_ICACHE_SIZE 0x2000 // 命令キャッシュ
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#define HW_DCACHE_SIZE 0x1000 // データキャッシュ
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#define HW_CACHE_LINE_SIZE 32
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#define HW_SYSTEM_CLOCK 33514000 // 正確には33513982?
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#define HW_CPU_CLOCK_ARM9 67027964
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#define HW_CPU_CLOCK HW_CPU_CLOCK_ARM9
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//----------------------------------------------------------------------
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||||
// システムコントロールコプロセッサ
|
||||
//----------------------------------------------------------------------
|
||||
|
||||
// レジスタ１（マスタコントロール）
|
||||
|
||||
#define HW_C1_SB1_BITSET 0x00000078 // レジスタ１用１固定ビット列
|
||||
|
||||
#define HW_C1_ITCM_LOAD_MODE 0x00080000 // 命令ＴＣＭ ロードモード
|
||||
#define HW_C1_DTCM_LOAD_MODE 0x00020000 // データＴＣＭ ロードモード
|
||||
#define HW_C1_ITCM_ENABLE 0x00040000 // 命令ＴＣＭ イネーブル
|
||||
#define HW_C1_DTCM_ENABLE 0x00010000 // データＴＣＭ イネーブル
|
||||
#define HW_C1_LD_INTERWORK_DISABLE 0x00008000 // ロード命令によるインターワーキング ディセーブル
|
||||
#define HW_C1_CACHE_ROUND_ROBIN 0x00004000 // キャッシュ置換アルゴリズム ラウンドロビン（最悪時のヒット率が安定）
|
||||
#define HW_C1_CACHE_PSEUDO_RANDOM 0x00000000 // 擬似ランダム
|
||||
#define HW_C1_EXCEPT_VEC_UPPER 0x00002000 // 例外ベクタ 上位アドレス（こちらに設定して下さい）
|
||||
#define HW_C1_EXCEPT_VEC_LOWER 0x00000000 // 下位アドレス
|
||||
#define HW_C1_ICACHE_ENABLE 0x00001000 // 命令キャッシュ イネーブル
|
||||
#define HW_C1_DCACHE_ENABLE 0x00000004 // データキャッシュ イネーブル
|
||||
#define HW_C1_LITTLE_ENDIAN 0x00000000 // リトルエンディアン
|
||||
#define HW_C1_BIG_ENDIAN 0x00000080 // ビッグエンディアン
|
||||
#define HW_C1_PROTECT_UNIT_ENABLE 0x00000001 // プロテクションユニット イネーブル
|
||||
|
||||
#define HW_C1_ICACHE_ENABLE_SHIFT 12
|
||||
#define HW_C1_DCACHE_ENABLE_SHIFT 2
|
||||
|
||||
|
||||
// レジスタ２（プロテクションリージョン・キャッシュ設定）
|
||||
|
||||
#define HW_C2_PR0_SFT 0 // プロテクションリージョン０
|
||||
#define HW_C2_PR1_SFT 1 // １
|
||||
#define HW_C2_PR2_SFT 2 // ２
|
||||
#define HW_C2_PR3_SFT 3 // ３
|
||||
#define HW_C2_PR4_SFT 4 // ４
|
||||
#define HW_C2_PR5_SFT 5 // ５
|
||||
#define HW_C2_PR6_SFT 6 // ６
|
||||
#define HW_C2_PR7_SFT 7 // ７
|
||||
|
||||
|
||||
// レジスタ３（プロテクションリージョン・ライトバッファ設定）
|
||||
|
||||
#define HW_C3_PR0_SFT 0 // プロテクションリージョン０
|
||||
#define HW_C3_PR1_SFT 1 // １
|
||||
#define HW_C3_PR2_SFT 2 // ２
|
||||
#define HW_C3_PR3_SFT 3 // ３
|
||||
#define HW_C3_PR4_SFT 4 // ４
|
||||
#define HW_C3_PR5_SFT 5 // ５
|
||||
#define HW_C3_PR6_SFT 6 // ６
|
||||
#define HW_C3_PR7_SFT 7 // ７
|
||||
|
||||
|
||||
// レジスタ５（プロテクションリージョン・アクセス許可）
|
||||
|
||||
#define HW_C5_PERMIT_MASK 0xf // プロテクションリージョンアクセス許可マスク
|
||||
|
||||
#define HW_C5_PERMIT_NA 0 // アクセス不許可
|
||||
#define HW_C5_PERMIT_RW 1 // リードライト許可
|
||||
#define HW_C5_PERMIT_RO 5 // リードオンリー許可
|
||||
|
||||
#define HW_C5_PR0_SFT 0 // プロテクションリージョン０
|
||||
#define HW_C5_PR1_SFT 4 // １
|
||||
#define HW_C5_PR2_SFT 8 // ２
|
||||
#define HW_C5_PR3_SFT 12 // ３
|
||||
#define HW_C5_PR4_SFT 16 // ４
|
||||
#define HW_C5_PR5_SFT 20 // ５
|
||||
#define HW_C5_PR6_SFT 24 // ６
|
||||
#define HW_C5_PR7_SFT 28 // ７
|
||||
|
||||
|
||||
// レジスタ６（プロテクションリージョン・ベースアドレス／サイズ）
|
||||
|
||||
#define HW_C6_PR_SIZE_MASK 0x0000003e // プロテクションリージョン サイズ
|
||||
#define HW_C6_PR_BASE_MASK 0xfffff000 // ベースアドレス
|
||||
|
||||
#define HW_C6_PR_SIZE_SHIFT 1
|
||||
#define HW_C6_PR_BASE_SHIFT 12
|
||||
|
||||
#define HW_C6_PR_ENABLE 1 // プロテクションリージョン イネーブル
|
||||
#define HW_C6_PR_DISABLE 0 // ディセーブル
|
||||
|
||||
#define HW_C6_PR_4KB 0x16 // リージョンサイズ ４ＫＢｙｔｅ
|
||||
#define HW_C6_PR_8KB 0x18 // ８ＫＢｙｔｅ
|
||||
#define HW_C6_PR_16KB 0x1a // １６ＫＢｙｔｅ
|
||||
#define HW_C6_PR_32KB 0x1c // ３２ＫＢｙｔｅ
|
||||
#define HW_C6_PR_64KB 0x1e // ６４ＫＢｙｔｅ
|
||||
#define HW_C6_PR_128KB 0x20 // １２８ＫＢｙｔｅ
|
||||
#define HW_C6_PR_256KB 0x22 // ２５６ＫＢｙｔｅ
|
||||
#define HW_C6_PR_512KB 0x24 // ５１２ＫＢｙｔｅ
|
||||
#define HW_C6_PR_1MB 0x26 // １ＭＢｙｔｅ
|
||||
#define HW_C6_PR_2MB 0x28 // ２ＭＢｙｔｅ
|
||||
#define HW_C6_PR_4MB 0x2a // ４ＭＢｙｔｅ
|
||||
#define HW_C6_PR_8MB 0x2c // ８ＭＢｙｔｅ
|
||||
#define HW_C6_PR_16MB 0x2e // １６ＭＢｙｔｅ
|
||||
#define HW_C6_PR_32MB 0x30 // ３２ＭＢｙｔｅ
|
||||
#define HW_C6_PR_64MB 0x32 // ６４ＭＢｙｔｅ
|
||||
#define HW_C6_PR_128MB 0x34 // １２８ＭＢｙｔｅ
|
||||
#define HW_C6_PR_256MB 0x36 // ２５６ＭＢｙｔｅ
|
||||
#define HW_C6_PR_512MB 0x38 // ５１２ＭＢｙｔｅ
|
||||
#define HW_C6_PR_1GB 0x3a // １ＧＢｙｔｅ
|
||||
#define HW_C6_PR_2GB 0x3c // ２ＧＢｙｔｅ
|
||||
#define HW_C6_PR_4GB 0x3e // ４ＧＢｙｔｅ
|
||||
|
||||
|
||||
// レジスタ７.１３（命令キャッシュ・プリフェッチ）
|
||||
|
||||
#define HW_C7_ICACHE_PREFCHP_MASK 0xffffffe0 // 命令キャッシュ プリフェッチアドレス
|
||||
|
||||
|
||||
// レジスタ７.１０、７.１４（キャッシュインデックス操作）
|
||||
|
||||
#define HW_C7_ICACHE_INDEX_MASK 0x00000fe0 // 命令キャッシュ インデックス
|
||||
#define HW_C7_DCACHE_INDEX_MASK 0x000003e0 // データキャッシュ インデックス
|
||||
#define HW_C7_CACHE_SET_NO_MASK 0xc0000000 // キャッシュ セットＮｏ
|
||||
|
||||
#define HW_C7_CACHE_INDEX_SHIFT 5
|
||||
#define HW_C7_CACHE_SET_NO_SHIFT 30
|
||||
|
||||
|
||||
// レジスタ９.０（キャッシュロックダウン）
|
||||
|
||||
#define HW_C9_LOCKDOWN_SET_NO_MASK 0x00000003 // キャッシュロックダウン セットＮｏ
|
||||
|
||||
#define HW_C9_LOCKDOWN_SET_NO_SHIFT 0
|
||||
|
||||
#define HW_C9_LOCKDOWN_LOAD_MODE 0x80000000 // キャッシュロックダウン ロードモード
|
||||
|
||||
|
||||
// レジスタ９.１（ＴＣＭベースアドレス／サイズ）
|
||||
|
||||
#define HW_C9_TCMR_SIZE_MASK 0x0000003e // ＴＣＭリージョン サイズ
|
||||
#define HW_C9_TCMR_BASE_MASK 0xfffff000 // ベースアドレス
|
||||
|
||||
#define HW_C9_TCMR_SIZE_SHIFT 1
|
||||
#define HW_C9_TCMR_BASE_SHIFT 12
|
||||
|
||||
#define HW_C9_TCMR_4KB 0x06 // リージョンサイズ ４ＫＢｙｔｅ
|
||||
#define HW_C9_TCMR_8KB 0x08 // ８ＫＢｙｔｅ
|
||||
#define HW_C9_TCMR_16KB 0x0a // １６ＫＢｙｔｅ
|
||||
#define HW_C9_TCMR_32KB 0x0c // ３２ＫＢｙｔｅ
|
||||
#define HW_C9_TCMR_64KB 0x0e // ６４ＫＢｙｔｅ
|
||||
#define HW_C9_TCMR_128KB 0x10 // １２８ＫＢｙｔｅ
|
||||
#define HW_C9_TCMR_256KB 0x12 // ２５６ＫＢｙｔｅ
|
||||
#define HW_C9_TCMR_512KB 0x14 // ５１２ＫＢｙｔｅ
|
||||
#define HW_C9_TCMR_1MB 0x16 // １ＭＢｙｔｅ
|
||||
#define HW_C9_TCMR_2MB 0x18 // ２ＭＢｙｔｅ
|
||||
#define HW_C9_TCMR_4MB 0x1a // ４ＭＢｙｔｅ
|
||||
#define HW_C9_TCMR_8MB 0x1c // ８ＭＢｙｔｅ
|
||||
#define HW_C9_TCMR_16MB 0x1e // １６ＭＢｙｔｅ
|
||||
#define HW_C9_TCMR_32MB 0x20 // ３２ＭＢｙｔｅ
|
||||
#define HW_C9_TCMR_64MB 0x22 // ６４ＭＢｙｔｅ
|
||||
#define HW_C9_TCMR_128MB 0x24 // １２８ＭＢｙｔｅ
|
||||
#define HW_C9_TCMR_256MB 0x26 // ２５６ＭＢｙｔｅ
|
||||
#define HW_C9_TCMR_512MB 0x28 // ５１２ＭＢｙｔｅ
|
||||
#define HW_C9_TCMR_1GB 0x2a // １ＧＢｙｔｅ
|
||||
#define HW_C9_TCMR_2GB 0x2c // ２ＧＢｙｔｅ
|
||||
#define HW_C9_TCMR_4GB 0x2e // ４ＧＢｙｔｅ
|
||||
|
||||
#ifdef __cplusplus
|
||||
} /* extern "C" */
|
||||
#endif
|
||||
|
||||
/* CTR_HW_ARM9_REG_H_ */
|
||||
#endif
|
||||
@ -16,6 +16,7 @@
|
||||
*---------------------------------------------------------------------------*/
|
||||
#ifndef CTR_HW_ARM9_MMAP_GLOBAL_H_
|
||||
#define CTR_HW_ARM9_MMAP_GLOBAL_H_
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
@ -25,6 +26,17 @@ extern "C" {
|
||||
GLOBAL MEMORY MAP
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
//----------------------------- ITCM
|
||||
#define HW_ITCM_IMAGE 0x01000000
|
||||
#define HW_ITCM 0x01ff8000
|
||||
#define HW_ITCM_SIZE 0x8000
|
||||
#define HW_ITCM_END (HW_ITCM + HW_ITCM_SIZE)
|
||||
|
||||
//----------------------------- DTCM
|
||||
#define HW_DTCM (HW_BIOS - HW_DTCM_SIZE*2)
|
||||
#define HW_DTCM_END (HW_DTCM + HW_DTCM_SIZE)
|
||||
#define HW_DTCM_SIZE 0x4000
|
||||
|
||||
//----------------------------- MAIN
|
||||
#define HW_MAIN_MEM 0x20000000
|
||||
#define HW_MAIN_MEM_SIZE 0x04000000
|
||||
|
||||
@ -14,7 +14,6 @@
|
||||
$Rev: 41 $
|
||||
$Author: nakasima $
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
#ifndef CTR_MISC_H_
|
||||
#define CTR_MISC_H_
|
||||
|
||||
|
||||
30
trunk/include/ctr/os/common/svc.h
Normal file
30
trunk/include/ctr/os/common/svc.h
Normal file
@ -0,0 +1,30 @@
|
||||
/*---------------------------------------------------------------------------*
|
||||
Project: CtrFirm - OS - include
|
||||
File: svc.h
|
||||
|
||||
Copyright 2008 Nintendo. All rights reserved.
|
||||
|
||||
These coded instructions, statements, and computer programs contain
|
||||
proprietary information of Nintendo of America Inc. and/or Nintendo
|
||||
Company Ltd., and are protected by Federal copyright law. They may
|
||||
not be disclosed to third parties or copied or duplicated in any form,
|
||||
in whole or in part, without the prior written consent of Nintendo.
|
||||
|
||||
$Log: $
|
||||
$NoKeywords: $
|
||||
*---------------------------------------------------------------------------*/
|
||||
#ifndef FIRM_OS_SVC_H_
|
||||
#define FIRM_OS_SVC_H_
|
||||
|
||||
#include <ctr/os/common/svc_id.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
} /* extern "C" */
|
||||
#endif
|
||||
|
||||
/* FIRM_OS_SVC_H_ */
|
||||
#endif
|
||||
50
trunk/include/ctr/os/common/svc_id.h
Normal file
50
trunk/include/ctr/os/common/svc_id.h
Normal file
@ -0,0 +1,50 @@
|
||||
/*---------------------------------------------------------------------------*
|
||||
Project: CtrFirm - OS - include
|
||||
File: svc_id.h
|
||||
|
||||
Copyright 2008 Nintendo. All rights reserved.
|
||||
|
||||
These coded instructions, statements, and computer programs contain
|
||||
proprietary information of Nintendo of America Inc. and/or Nintendo
|
||||
Company Ltd., and are protected by Federal copyright law. They may
|
||||
not be disclosed to third parties or copied or duplicated in any form,
|
||||
in whole or in part, without the prior written consent of Nintendo.
|
||||
|
||||
$Date:: 2008-11-28#$
|
||||
$Rev: 42 $
|
||||
$Author: nakasima $
|
||||
*---------------------------------------------------------------------------*/
|
||||
#ifndef FIRM_OS_SVC_ID_H_
|
||||
#define FIRM_OS_SVC_ID_H_
|
||||
|
||||
#include <ctr/types.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
|
||||
#define SVC_ID_PREMASK 0x3f
|
||||
#define SVC_ID_SHIFT 1
|
||||
|
||||
#define SVC_ID_SEMIHOST_ARM 0x12
|
||||
#define SVC_ID_SEMIHOST_THUMB 0xab
|
||||
|
||||
|
||||
typedef enum
|
||||
{
|
||||
SVC_ID_DEC_SIGN = 34,
|
||||
SVC_ID_WAIT_BY_LOOP = 3,
|
||||
|
||||
// reserve 0x2b for semihosting (0xab & 0x3f == 0x2b)
|
||||
// overlap semihosting ((0x123456>>16) & 0x3f == 0x12)
|
||||
}
|
||||
OSSvcID;
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
} /* extern "C" */
|
||||
#endif
|
||||
|
||||
/* FIRM_OS_SVC_ID_H_ */
|
||||
#endif
|
||||
Loading…
Reference in New Issue
Block a user