mirror of
https://github.com/rvtr/ctr_firmware.git
synced 2025-10-31 07:51:08 -04:00
MMUをディセーブルにするとNE1TBでデバッグプリントが出ているので現状でコミット。
git-svn-id: file:///Volumes/Transfer/gigaleak_20231201/2020-09-30%20-%20paladin.7z/paladin/ctr_firmware@194 b871894f-2f95-9b40-918c-086798483c85
This commit is contained in:
parent
35a2aa8698
commit
641b38787b
@ -112,26 +112,18 @@ CTR_BUILD_TYPE ?= $(BROM_BUILD_TYPE)
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CTR_BUILD_DIR ?= $(BROM_BUILD_DIR)
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#
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# PMIC Revision
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#
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BROM_PMIC_REV ?= 100
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# replace TwlSDK
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CTR_PMIC_REV ?= $(BROM_PMIC_REV)
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#
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# Debugger Type
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#
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# one of [ARM/KMC]
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#
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ifeq ($(BROM_PLATFORM),MG20EMU)
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BROM_DEBUGGER ?= KMC
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endif
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ifneq ($(BROM_PLATFORM),MG20EMU)
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ifneq ($(BROM_PLATFORM),NE1EMU)
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BROM_DEBUGGER ?= ARM
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endif
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endif
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BROM_DEBUGGER ?= KMC
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# replace TwlSDK
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CTR_DEBUGGER ?= $(BROM_DEBUGGER)
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@ -278,7 +278,7 @@ asm void stupEnableCP15( void )
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orr r0, r0, r1
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mcr p15, 0, r0, c1, c0, 0
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// mcr p15, 0, r0, c1, c0, 0
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// Invalidate Caches
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mov r0, #0
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3
trunk/tools/bootrom/ne1tb/readme.txt
Normal file
3
trunk/tools/bootrom/ne1tb/readme.txt
Normal file
@ -0,0 +1,3 @@
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・PARTNERを使ってNE1ボードへteg_dev11.axfをロードすると、NORフラッシュ上のブートROMが更新されます。
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・"export CTR_PLATFORM=NE1EMU" または "make CTR_PLATFORM=NE1EMU" でビルドして下さい。
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・"export CTR_DEBUGGER=KMC" または "make CTR_DEBUGGER=KMC" でビルドして下さい。
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310
trunk/tools/bootrom/ne1tb/realview.map
Normal file
310
trunk/tools/bootrom/ne1tb/realview.map
Normal file
@ -0,0 +1,310 @@
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ARM Linker, RVCT3.0 [Build 441]
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================================================================================
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Image Symbol Table
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Local Symbols
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Symbol Name Value Ov Type Size Object(Section)
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$v0 0x00000000 ARM Code 0 crt0.o(.emb_text)
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../../memcpset.s 0x00000000 Number 0 rt_memcpy.o ABSOLUTE
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../../memcpset.s 0x00000000 Number 0 memcpy.o ABSOLUTE
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../../memcpset.s 0x00000000 Number 0 rt_memcpy_w_mpc.o ABSOLUTE
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c:\\nctr\\ctr_firmware_bak\\bootrom\\build\\libraries\\init\\ARM11\\crt0.c 0x00000000 Number 0 crt0.o ABSOLUTE
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c:\\nctr\\ctr_firmware_bak\\bootrom\\build\\libraries\\init\\common\\crt0_excp.c 0x00000000 Number 0 crt0_excp.o ABSOLUTE
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c:\\nctr\\ctr_firmware_bak\\bootrom\\build\\libraries\\mi\\common\\mi_memory.c 0x00000000 Number 0 mi_memory.o ABSOLUTE
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c:\\nctr\\ctr_firmware_bak\\bootrom\\build\\libraries\\os\\common\\os_boot.c 0x00000000 Number 0 os_boot.o ABSOLUTE
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c:\\nctr\\ctr_firmware_bak\\bootrom\\build\\libraries\\os\\common\\os_cache.c 0x00000000 Number 0 os_cache.o ABSOLUTE
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c:\\nctr\\ctr_firmware_bak\\bootrom\\build\\libraries\\os\\common\\os_interrupt.c 0x00000000 Number 0 os_interrupt.o ABSOLUTE
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c:\\nctr\\ctr_firmware_bak\\bootrom\\build\\libraries\\os\\common\\os_irqHandler.c 0x00000000 Number 0 os_irqHandler.o ABSOLUTE
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c:\\nctr\\ctr_firmware_bak\\bootrom\\build\\libraries\\os\\common\\os_system.c 0x00000000 Number 0 os_system.o ABSOLUTE
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c:\nctr\ctr_firmware_bak\bootrom\build\libraries\init\ARM11\crt0.c 0x00000000 Number 0 crt0.o ABSOLUTE
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c:\nctr\ctr_firmware_bak\bootrom\build\libraries\init\common\crt0_excp.c 0x00000000 Number 0 crt0_excp.o ABSOLUTE
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c:\nctr\ctr_firmware_bak\bootrom\build\libraries\mi\common\mi_memory.c 0x00000000 Number 0 mi_memory.o ABSOLUTE
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c:\nctr\ctr_firmware_bak\bootrom\build\libraries\os\common\os_boot.c 0x00000000 Number 0 os_boot.o ABSOLUTE
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c:\nctr\ctr_firmware_bak\bootrom\build\libraries\os\common\os_cache.c 0x00000000 Number 0 os_cache.o ABSOLUTE
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c:\nctr\ctr_firmware_bak\bootrom\build\libraries\os\common\os_interrupt.c 0x00000000 Number 0 os_interrupt.o ABSOLUTE
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c:\nctr\ctr_firmware_bak\bootrom\build\libraries\os\common\os_irqHandler.c 0x00000000 Number 0 os_irqHandler.o ABSOLUTE
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c:\nctr\ctr_firmware_bak\bootrom\build\libraries\os\common\os_system.c 0x00000000 Number 0 os_system.o ABSOLUTE
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crt0_secure.c 0x00000000 Number 0 crt0_secure.o ABSOLUTE
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crt0_secure.c 0x00000000 Number 0 crt0_secure.o ABSOLUTE
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os_mmu.c 0x00000000 Number 0 os_mmu.o ABSOLUTE
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os_mmu.c 0x00000000 Number 0 os_mmu.o ABSOLUTE
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.emb_text 0x00000000 Section 180 crt0.o(.emb_text)
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$v0 0x00001000 ARM Code 0 crt0_excp.o(.emb_text)
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.emb_text 0x00001000 Section 242 crt0_excp.o(.emb_text)
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i.osDisableInterrupts 0x000010f2 Section 8 os_interrupt.o(i.osDisableInterrupts)
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.text 0x000010fc Section 16 memcpy.o(.text)
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.text 0x0000110c Section 116 rt_memcpy_w_mpc.o(.text)
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.text 0x00001180 Section 212 rt_memcpy.o(.text)
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i.stupInitMMUTable 0x00001254 Section 496 crt0_secure.o(i.stupInitMMUTable)
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$v0 0x00008000 ARM Code 0 crt0_secure.o(.emb_text)
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.emb_text 0x00008000 Section 960 crt0_secure.o(.emb_text)
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$v0 0x000083c0 ARM Code 0 os_system.o(.emb_text)
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.emb_text 0x000083c0 Section 44 os_system.o(.emb_text)
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$v0 0x000083ec ARM Code 0 os_interrupt.o(.emb_text)
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.emb_text 0x000083ec Section 192 os_interrupt.o(.emb_text)
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$v0 0x000084ac ARM Code 0 os_cache.o(.emb_text)
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.emb_text 0x000084ac Section 624 os_cache.o(.emb_text)
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$v0 0x0000871c ARM Code 0 os_mmu.o(.emb_text)
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.emb_text 0x0000871c Section 544 os_mmu.o(.emb_text)
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i.i_osFinalize 0x0000893c Section 104 os_boot.o(i.i_osFinalize)
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i.osClearInterruptPendingMask 0x000089a4 Section 64 os_interrupt.o(i.osClearInterruptPendingMask)
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i.osDisableInterruptMask 0x000089e4 Section 64 os_interrupt.o(i.osDisableInterruptMask)
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.constdata$1 0x00008a24 Data 0 os_boot.o(.constdata)
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.constdata 0x00008a24 Section 16 os_boot.o(.constdata)
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Global Symbols
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Symbol Name Value Ov Type Size Object(Section)
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BuildAttributes$$THUMB_ISAv3$ARM_ISAv6$M$E$P$VFPv2$PE$FZ_POSZERO$PLD1$A:L22UL41UL21$X:L11$S22US41US21$IEEE1$IW$USESV6$~STKCKD$USESV7$~SHL$OSPACE$EBA8$REQ8$EABIv2 0x00000000 Number 0 anon$$obj.o ABSOLUTE
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_start 0x00000000 ARM Code 180 crt0.o(.emb_text)
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stupInitExceptions 0x00001000 ARM Code 64 crt0_excp.o(.emb_text)
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i_stupExcpTerminateCode 0x00001040 ARM Code 8 crt0_excp.o(.emb_text)
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i_stupIAbtTerminateCode 0x00001048 ARM Code 8 crt0_excp.o(.emb_text)
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i_stupSwiVeneerCode 0x00001050 ARM Code 8 crt0_excp.o(.emb_text)
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i_stupIrqVeneer 0x00001058 ARM Code 4 crt0_excp.o(.emb_text)
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i_stupFiqVeneer 0x0000105c ARM Code 8 crt0_excp.o(.emb_text)
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i_stupSwiVeneer 0x00001064 ARM Code 8 crt0_excp.o(.emb_text)
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i_stupUndefVeneer 0x0000106c ARM Code 8 crt0_excp.o(.emb_text)
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i_stupIAbtVeneer 0x00001074 ARM Code 8 crt0_excp.o(.emb_text)
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i_stupDAbtVeneer 0x0000107c ARM Code 8 crt0_excp.o(.emb_text)
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i_stupSwiSemihosting 0x00001084 ARM Code 8 crt0_excp.o(.emb_text)
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i_stupSwiHandler 0x0000108c ARM Code 102 crt0_excp.o(.emb_text)
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SWI_Table 0x000010f0 Data 0 crt0_excp.o(.emb_text)
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SWI_TableEnd 0x000010f3 Thumb Code 0 crt0_excp.o(.emb_text)
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osDisableInterrupts 0x000010f3 Thumb Code 8 os_interrupt.o(i.osDisableInterrupts)
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memcpy 0x000010fc ARM Code 16 memcpy.o(.text)
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__aeabi_memcpy4 0x0000110c ARM Code 0 rt_memcpy_w_mpc.o(.text)
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__aeabi_memcpy8 0x0000110c ARM Code 0 rt_memcpy_w_mpc.o(.text)
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__rt_memcpy_w 0x0000110c ARM Code 116 rt_memcpy_w_mpc.o(.text)
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_memcpy_lastbytes_aligned 0x00001168 ARM Code 0 rt_memcpy_w_mpc.o(.text)
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__aeabi_memcpy 0x00001180 ARM Code 0 rt_memcpy.o(.text)
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__rt_memcpy 0x00001180 ARM Code 212 rt_memcpy.o(.text)
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_memcpy_lastbytes 0x00001234 ARM Code 0 rt_memcpy.o(.text)
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stupInitMMUTable 0x00001254 ARM Code 456 crt0_secure.o(i.stupInitMMUTable)
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i_stupStartHandler 0x00008000 ARM Code 96 crt0_secure.o(.emb_text)
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stupInitMMU 0x00008078 ARM Code 88 crt0_secure.o(.emb_text)
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i_stupInitDDR2 0x000080d4 ARM Code 360 crt0_secure.o(.emb_text)
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stupDisableCP15 0x0000828c ARM Code 56 crt0_secure.o(.emb_text)
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stupEnableCP15 0x000082c8 ARM Code 52 crt0_secure.o(.emb_text)
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__user_initial_stackheap 0x00008300 ARM Code 4 crt0_secure.o(.emb_text)
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stupInitSections 0x00008304 ARM Code 4 crt0_secure.o(.emb_text)
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stupInitStaticSections 0x00008308 ARM Code 60 crt0_secure.o(.emb_text)
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i_stupCpuCopy32 0x00008354 ARM Code 24 crt0_secure.o(.emb_text)
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i_stupCpuClear32 0x0000836c ARM Code 20 crt0_secure.o(.emb_text)
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i_stupNotifyToARM9 0x00008380 ARM Code 20 crt0_secure.o(.emb_text)
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i_stupWaitARM9 0x00008398 ARM Code 24 crt0_secure.o(.emb_text)
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i_stupWaitCpuCycles 0x000083b0 ARM Code 16 crt0_secure.o(.emb_text)
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osGetProcMode 0x000083c0 ARM Code 12 os_system.o(.emb_text)
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i_osWaitCpuCycles 0x000083cc ARM Code 16 os_system.o(.emb_text)
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osHalt 0x000083dc ARM Code 8 os_system.o(.emb_text)
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osHaltUntilEvent 0x000083e4 ARM Code 8 os_system.o(.emb_text)
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osEnableIrq 0x000083ec ARM Code 20 os_interrupt.o(.emb_text)
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osDisableIrq 0x00008400 ARM Code 20 os_interrupt.o(.emb_text)
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osRestoreIrq 0x00008414 ARM Code 24 os_interrupt.o(.emb_text)
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osEnableFiq 0x0000842c ARM Code 20 os_interrupt.o(.emb_text)
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osDisableFiq 0x00008440 ARM Code 20 os_interrupt.o(.emb_text)
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osRestoreFiq 0x00008454 ARM Code 24 os_interrupt.o(.emb_text)
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osEnableIrqAndFiq 0x0000846c ARM Code 20 os_interrupt.o(.emb_text)
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osDisableIrqAndFiq 0x00008480 ARM Code 20 os_interrupt.o(.emb_text)
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osRestoreIrqAndFiq 0x00008494 ARM Code 24 os_interrupt.o(.emb_text)
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osEnableDCache 0x000084ac ARM Code 24 os_cache.o(.emb_text)
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osDisableDCache 0x000084c4 ARM Code 24 os_cache.o(.emb_text)
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osRestoreDCache 0x000084dc ARM Code 40 os_cache.o(.emb_text)
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osInvalidateDCacheAll 0x00008504 ARM Code 12 os_cache.o(.emb_text)
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osStoreDCacheAll 0x00008510 ARM Code 44 os_cache.o(.emb_text)
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osFlushDCacheAll 0x0000853c ARM Code 52 os_cache.o(.emb_text)
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osInvalidateDCacheRange 0x00008570 ARM Code 28 os_cache.o(.emb_text)
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osStoreDCacheRange 0x0000858c ARM Code 28 os_cache.o(.emb_text)
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osFlushDCacheRange 0x000085a8 ARM Code 36 os_cache.o(.emb_text)
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osLockdownDCacheRange 0x000085cc ARM Code 0 os_cache.o(.emb_text)
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osUnlockdownDCache 0x000085cc ARM Code 0 os_cache.o(.emb_text)
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osUnlockdownDCacheAll 0x000085cc ARM Code 0 os_cache.o(.emb_text)
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osWaitWriteBufferEmpty 0x000085cc ARM Code 12 os_cache.o(.emb_text)
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osTouchDCacheRange 0x000085d8 ARM Code 28 os_cache.o(.emb_text)
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osKeepDataAccessOrder 0x000085f4 ARM Code 12 os_cache.o(.emb_text)
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osEnableICache 0x00008600 ARM Code 24 os_cache.o(.emb_text)
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osDisableICache 0x00008618 ARM Code 24 os_cache.o(.emb_text)
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osRestoreICache 0x00008630 ARM Code 40 os_cache.o(.emb_text)
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osInvalidateICacheAll 0x00008658 ARM Code 12 os_cache.o(.emb_text)
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osInvalidateICacheRange 0x00008664 ARM Code 28 os_cache.o(.emb_text)
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osPrefetchICacheRange 0x00008680 ARM Code 28 os_cache.o(.emb_text)
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osInvalidateInstPrefetchBuffer 0x0000869c ARM Code 12 os_cache.o(.emb_text)
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osEnableBCache 0x000086a8 ARM Code 20 os_cache.o(.emb_text)
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osDisableBCache 0x000086bc ARM Code 20 os_cache.o(.emb_text)
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osRestoreBCache 0x000086d0 ARM Code 36 os_cache.o(.emb_text)
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osInvalidateBCacheAll 0x000086f4 ARM Code 12 os_cache.o(.emb_text)
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osInvalidateBCacheRange 0x00008700 ARM Code 28 os_cache.o(.emb_text)
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osEnableMMU 0x0000871c ARM Code 16 os_mmu.o(.emb_text)
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osDisableMMU 0x0000872c ARM Code 16 os_mmu.o(.emb_text)
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osGetPhysicalAddr 0x0000873c ARM Code 44 os_mmu.o(.emb_text)
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osGetMemRegionType 0x00008770 ARM Code 36 os_mmu.o(.emb_text)
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osGetMemRegionCacheAttr 0x00008794 ARM Code 36 os_mmu.o(.emb_text)
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osIsMemRegionShareable 0x000087b8 ARM Code 36 os_mmu.o(.emb_text)
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osIsMemRegionAbort 0x000087dc ARM Code 24 os_mmu.o(.emb_text)
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osInvalidateTLBAll 0x000087f4 ARM Code 12 os_mmu.o(.emb_text)
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osInvalidateITLBAll 0x00008800 ARM Code 12 os_mmu.o(.emb_text)
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osInvalidateDTLBAll 0x0000880c ARM Code 12 os_mmu.o(.emb_text)
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osInvalidateTLBRange 0x00008818 ARM Code 32 os_mmu.o(.emb_text)
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osInvalidateITLBRange 0x00008838 ARM Code 32 os_mmu.o(.emb_text)
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osInvalidateDTLBRange 0x00008858 ARM Code 32 os_mmu.o(.emb_text)
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osInvalidateTLBAllWithASID 0x00008878 ARM Code 12 os_mmu.o(.emb_text)
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osInvalidateITLBAllWithASID 0x00008884 ARM Code 12 os_mmu.o(.emb_text)
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osInvalidateDTLBAllWithASID 0x00008890 ARM Code 12 os_mmu.o(.emb_text)
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osInvalidateTLBRangeWithASID 0x0000889c ARM Code 48 os_mmu.o(.emb_text)
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osInvalidateITLBRangeWithASID 0x000088cc ARM Code 40 os_mmu.o(.emb_text)
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osInvalidateDTLBRangeWithASID 0x000088f4 ARM Code 40 os_mmu.o(.emb_text)
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osStartTLBLockDown 0x0000891c ARM Code 20 os_mmu.o(.emb_text)
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osEndTLBLockDown 0x00008930 ARM Code 12 os_mmu.o(.emb_text)
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i_osFinalize 0x0000893d Thumb Code 100 os_boot.o(i.i_osFinalize)
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osClearInterruptPendingMask 0x000089a5 Thumb Code 58 os_interrupt.o(i.osClearInterruptPendingMask)
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osDisableInterruptMask 0x000089e5 Thumb Code 58 os_interrupt.o(i.osDisableInterruptMask)
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Image$$SEC_RO$$Limit 0x00008a34 Number 0 anon$$obj.o(linker$$defined$$symbols)
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Image$$RW$$Base 0x8ffe8000 Number 0 anon$$obj.o(linker$$defined$$symbols)
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Image$$ZI$$ZI$$Base 0x8ffe8000 Number 0 anon$$obj.o(linker$$defined$$symbols)
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Image$$ZI$$ZI$$Limit 0x8ffe8000 Number 0 anon$$obj.o(linker$$defined$$symbols)
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================================================================================
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Memory Map of the image
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Image Entry point : 0x00000000
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Load Region LOAD_NORMAL (Base: 0x00000000, Size: 0x000000b4, Max: 0x00001000, ABSOLUTE)
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Execution Region STUP_ENTRY (Base: 0x00000000, Size: 0x000000b4, Max: 0xffffffff, ABSOLUTE)
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Base Addr Size Type Attr Idx E Section Name Object
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0x00000000 0x000000b4 Code RO 3 * .emb_text crt0.o
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Load Region LOAD_UNABORT (Base: 0x00001000, Size: 0x00000444, Max: 0x00007000, ABSOLUTE)
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Execution Region NML_RO (Base: 0x00001000, Size: 0x000000fc, Max: 0xffffffff, ABSOLUTE)
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Base Addr Size Type Attr Idx E Section Name Object
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0x00001000 0x000000f2 Code RO 244 .emb_text crt0_excp.o
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0x000010f2 0x00000008 Code RO 321 i.osDisableInterrupts os_interrupt.o(Release\libos.brom.thumb.a)
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Execution Region RO (Base: 0x000010fc, Size: 0x00000348, Max: 0xffffffff, ABSOLUTE)
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Base Addr Size Type Attr Idx E Section Name Object
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|
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0x000010fc 0x00000010 Code RO 623 .text memcpy.o(c_t__un.l)
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0x0000110c 0x00000074 Code RO 625 .text rt_memcpy_w_mpc.o(c_t__un.l)
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0x00001180 0x000000d4 Code RO 627 .text rt_memcpy.o(c_t__un.l)
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0x00001254 0x000001f0 Code RO 223 i.stupInitMMUTable crt0_secure.o
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Load Region LOAD_SECURE (Base: 0x00008000, Size: 0x00000a34, Max: 0x00008000, ABSOLUTE)
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Execution Region SEC_RO (Base: 0x00008000, Size: 0x00000a34, Max: 0xffffffff, ABSOLUTE)
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Base Addr Size Type Attr Idx E Section Name Object
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0x00008000 0x000003c0 Code RO 222 .emb_text crt0_secure.o
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0x000083c0 0x0000002c Code RO 257 .emb_text os_system.o(Release\libos.brom.thumb.a)
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0x000083ec 0x000000c0 Code RO 315 .emb_text os_interrupt.o(Release\libos.brom.thumb.a)
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0x000084ac 0x00000270 Code RO 543 .emb_text os_cache.o(Release\libos.brom.thumb.a)
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0x0000871c 0x00000220 Code RO 591 .emb_text os_mmu.o(Release\libos.brom.thumb.a)
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0x0000893c 0x00000068 Code RO 298 i.i_osFinalize os_boot.o(Release\libos.brom.thumb.a)
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0x000089a4 0x00000040 Code RO 333 i.osClearInterruptPendingMask os_interrupt.o(Release\libos.brom.thumb.a)
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0x000089e4 0x00000040 Code RO 329 i.osDisableInterruptMask os_interrupt.o(Release\libos.brom.thumb.a)
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0x00008a24 0x00000010 Data RO 299 .constdata os_boot.o(Release\libos.brom.thumb.a)
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|
||||
|
||||
Execution Region RW (Base: 0x8ffe8000, Size: 0x00000000, Max: 0x00008000, ABSOLUTE)
|
||||
|
||||
**** No section assigned to this execution region ****
|
||||
|
||||
|
||||
Execution Region ZI (Base: 0x8ffe8000, Size: 0x00000000, Max: 0xffffffff, ABSOLUTE)
|
||||
|
||||
**** No section assigned to this execution region ****
|
||||
|
||||
|
||||
Execution Region BUF_OVER_BARRIER (Base: 0x8fff0000, Size: 0x00000000, Max: 0x00000000, ABSOLUTE, UNINIT)
|
||||
|
||||
Base Addr Size Type Attr Idx E Section Name Object
|
||||
|
||||
0x8fff0000 0x00000000 Zero RW 1 BUF_OVER_BARRIER.bss anon$$obj.o
|
||||
|
||||
|
||||
Execution Region TO_FIRM (Base: 0x8fffa000, Size: 0x00004000, Max: 0x00004000, ABSOLUTE, UNINIT)
|
||||
|
||||
Base Addr Size Type Attr Idx E Section Name Object
|
||||
|
||||
0x8fffa000 0x00004000 Zero RW 2 TO_FIRM.bss anon$$obj.o
|
||||
|
||||
|
||||
================================================================================
|
||||
|
||||
Image component sizes
|
||||
|
||||
|
||||
Code (inc. data) RO Data RW Data ZI Data Debug Object Name
|
||||
|
||||
180 24 0 0 0 7356 crt0.o
|
||||
242 62 0 0 0 500 crt0_excp.o
|
||||
1456 176 0 0 0 1236 crt0_secure.o
|
||||
|
||||
------------------------------------------------------------------------
|
||||
1878 262 0 0 16384 9092 Object Totals
|
||||
0 0 0 0 16384 0 (incl. Generated)
|
||||
0 0 0 0 0 0 (incl. Padding)
|
||||
|
||||
------------------------------------------------------------------------
|
||||
|
||||
Code (inc. data) RO Data RW Data ZI Data Debug Library Member Name
|
||||
|
||||
16 0 0 0 0 0 memcpy.o
|
||||
104 4 16 0 0 576 os_boot.o
|
||||
624 0 0 0 0 536 os_cache.o
|
||||
328 12 0 0 0 3252 os_interrupt.o
|
||||
544 8 0 0 0 368 os_mmu.o
|
||||
44 0 0 0 0 356 os_system.o
|
||||
212 0 0 0 0 0 rt_memcpy.o
|
||||
116 0 0 0 0 0 rt_memcpy_w_mpc.o
|
||||
|
||||
------------------------------------------------------------------------
|
||||
1990 24 16 0 0 5088 Library Totals
|
||||
2 0 0 0 0 0 (incl. Padding)
|
||||
|
||||
------------------------------------------------------------------------
|
||||
|
||||
Code (inc. data) RO Data RW Data ZI Data Debug Library Name
|
||||
|
||||
1644 24 16 0 0 5088 Release\libos.brom.thumb.a
|
||||
344 0 0 0 0 0 c_t__un.l
|
||||
|
||||
------------------------------------------------------------------------
|
||||
1990 24 16 0 0 5088 Library Totals
|
||||
|
||||
------------------------------------------------------------------------
|
||||
|
||||
================================================================================
|
||||
|
||||
|
||||
Code (inc. data) RO Data RW Data ZI Data Debug
|
||||
|
||||
3868 286 16 0 16384 14180 Grand Totals
|
||||
3868 286 16 0 16384 14180 Image Totals
|
||||
|
||||
================================================================================
|
||||
|
||||
Total RO Size (Code + RO Data) 3884 ( 3.79kB)
|
||||
Total RW Size (RW Data + ZI Data) 16384 ( 16.00kB)
|
||||
Total ROM Size (Code + RO Data + RW Data) 3884 ( 3.79kB)
|
||||
|
||||
================================================================================
|
||||
|
||||
BIN
trunk/tools/bootrom/ne1tb/teg_dev11.axf
Normal file
BIN
trunk/tools/bootrom/ne1tb/teg_dev11.axf
Normal file
Binary file not shown.
1326
trunk/tools/bootrom/ne1tb/teg_dev11.txt
Normal file
1326
trunk/tools/bootrom/ne1tb/teg_dev11.txt
Normal file
File diff suppressed because it is too large
Load Diff
Loading…
Reference in New Issue
Block a user