From 5c54d429f3583336b8c8ba590d5c25450bf0143e Mon Sep 17 00:00:00 2001 From: nakasima Date: Tue, 27 Jan 2009 09:06:36 +0000 Subject: [PATCH] =?UTF-8?q?SMP=E3=83=93=E3=83=AB=E3=83=89=E3=82=B9?= =?UTF-8?q?=E3=82=A4=E3=83=83=E3=83=81=E8=BF=BD=E5=8A=A0=E3=80=82?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit git-svn-id: file:///Volumes/Transfer/gigaleak_20231201/2020-09-30%20-%20paladin.7z/paladin/ctr_firmware@218 b871894f-2f95-9b40-918c-086798483c85 --- .../build/buildtools/commondefs.config | 4 +++ .../build/libraries/os/common/os_interrupt.c | 33 ++++++++++--------- .../build/libraries/os/common/os_system.c | 27 +++++++++++++++ trunk/bootrom/include/brom/os/common/system.h | 33 +++++++++++++++++-- 4 files changed, 80 insertions(+), 17 deletions(-) diff --git a/trunk/bootrom/build/buildtools/commondefs.config b/trunk/bootrom/build/buildtools/commondefs.config index 914ac62..695507e 100644 --- a/trunk/bootrom/build/buildtools/commondefs.config +++ b/trunk/bootrom/build/buildtools/commondefs.config @@ -22,6 +22,7 @@ BROM_COMMONDEFS_CONFIG_ = TRUE #BROM_DEV_EARLY_RELEASE = TRUE #BROM_DEF_LINK_SCATLD = TRUE BROM_ENABLE_SCATLD_VFP = TRUE +#BROM_ENABLE_SMP_CODE = TRUE ifdef BROM_ENABLE_BOOTROM_WRITE MACRO_FLAGS += -DBROM_ENABLE_BOOTROM_WRITE @@ -37,6 +38,9 @@ ifeq ($(CODEGEN_PROC),ARM11) MACRO_FLAGS += -DBROM_ENABLE_SCATLD_VFP endif endif +ifdef BROM_ENABLE_SMP_CODE +MACRO_FLAGS += -DBROM_ENABLE_SMP_CODE +endif #---------------------------------------------------------------------------- endif # BROM_COMMONDEFS_CONFIG_ diff --git a/trunk/bootrom/build/libraries/os/common/os_interrupt.c b/trunk/bootrom/build/libraries/os/common/os_interrupt.c index 9aafa52..079fd68 100644 --- a/trunk/bootrom/build/libraries/os/common/os_interrupt.c +++ b/trunk/bootrom/build/libraries/os/common/os_interrupt.c @@ -836,7 +836,7 @@ BOOL osSetInterruptCheckID( OSIntrID id ) #ifdef SDK_ARM11 u32 ofs = id/32; u32 sft = id%32; - u32 *buf = &((OSIntrMask *)HW_INTR_CHECK0_BUF)->w[ofs]; + u32 *buf = &((OSIntrMask *)OS_INTR_CHECK_BUF())->w[ofs]; #else // SDK_ARM9 u32 sft = id; u32 *buf = (OSIntrMask *)HW_INTR_CHECK_BUF; @@ -865,7 +865,7 @@ BOOL osClearInterruptCheckID( OSIntrID id ) #ifdef SDK_ARM11 u32 ofs = id/32; u32 sft = id%32; - u32 *buf = &((OSIntrMask *)HW_INTR_CHECK0_BUF)->w[ofs]; + u32 *buf = &((OSIntrMask *)OS_INTR_CHECK_BUF())->w[ofs]; #else // SDK_ARM9 u32 sft = id; u32 *buf = (OSIntrMask *)HW_INTR_CHECK_BUF; @@ -893,7 +893,7 @@ BOOL osIsInterruptCheckID( OSIntrID id ) #ifdef SDK_ARM11 u32 ofs = id/32; u32 sft = id%32; - u32 *buf = &((OSIntrMask *)HW_INTR_CHECK0_BUF)->w[ofs]; + u32 *buf = &((OSIntrMask *)OS_INTR_CHECK_BUF())->w[ofs]; #else // SDK_ARM9 u32 sft = id; u32 *buf = (OSIntrMask *)HW_INTR_CHECK_BUF; @@ -917,10 +917,11 @@ void osSetInterruptCheckMask( OSIntrMask mask ) { OSIntrMode enabled = osDisableInterrupts(); #ifdef SDK_ARM11 - ((OSIntrMask *)HW_INTR_CHECK0_BUF)->w[0] |= mask.w[0]; - ((OSIntrMask *)HW_INTR_CHECK0_BUF)->w[1] |= mask.w[1]; - ((OSIntrMask *)HW_INTR_CHECK0_BUF)->w[2] |= mask.w[2]; - ((OSIntrMask *)HW_INTR_CHECK0_BUF)->w[3] |= mask.w[3]; + OSIntrMask *buf = (void *)OS_INTR_CHECK_BUF(); + buf->w[0] |= mask.w[0]; + buf->w[1] |= mask.w[1]; + buf->w[2] |= mask.w[2]; + buf->w[3] |= mask.w[3]; #else // SDK_ARM9 *(OSIntrMask *)HW_INTR_CHECK_BUF |= mask; #endif // SDK_ARM9 @@ -940,10 +941,11 @@ void osClearInterruptCheckMask( OSIntrMask mask ) { OSIntrMode enabled = osDisableInterrupts(); #ifdef SDK_ARM11 - ((OSIntrMask *)HW_INTR_CHECK0_BUF)->w[0] &= ~mask.w[0]; - ((OSIntrMask *)HW_INTR_CHECK0_BUF)->w[1] &= ~mask.w[1]; - ((OSIntrMask *)HW_INTR_CHECK0_BUF)->w[2] &= ~mask.w[2]; - ((OSIntrMask *)HW_INTR_CHECK0_BUF)->w[3] &= ~mask.w[3]; + OSIntrMask *buf = (void *)OS_INTR_CHECK_BUF(); + buf->w[0] &= ~mask.w[0]; + buf->w[1] &= ~mask.w[1]; + buf->w[2] &= ~mask.w[2]; + buf->w[3] &= ~mask.w[3]; #else // SDK_ARM9 *(OSIntrMask *)HW_INTR_CHECK_BUF &= ~mask; #endif // SDK_ARM9 @@ -964,10 +966,11 @@ BOOL osIsInterruptCheckMask( OSIntrMask mask ) u32 tmp; #ifdef SDK_ARM11 OSIntrMode enabled = osDisableInterrupts(); - tmp = ((OSIntrMask *)HW_INTR_CHECK0_BUF)->w[0] & mask.w[0]; - tmp |= ((OSIntrMask *)HW_INTR_CHECK0_BUF)->w[1] & mask.w[1]; - tmp |= ((OSIntrMask *)HW_INTR_CHECK0_BUF)->w[2] & mask.w[2]; - tmp |= ((OSIntrMask *)HW_INTR_CHECK0_BUF)->w[3] & mask.w[3]; + OSIntrMask *buf = (void *)OS_INTR_CHECK_BUF(); + tmp = buf->w[0] & mask.w[0]; + tmp |= buf->w[1] & mask.w[1]; + tmp |= buf->w[2] & mask.w[2]; + tmp |= buf->w[3] & mask.w[3]; (void)osRestoreInterrupts( enabled ); #else // SDK_ARM9 tmp = osGetInterruptCheckMask() & mask; diff --git a/trunk/bootrom/build/libraries/os/common/os_system.c b/trunk/bootrom/build/libraries/os/common/os_system.c index 50393cd..0b8d6e6 100644 --- a/trunk/bootrom/build/libraries/os/common/os_system.c +++ b/trunk/bootrom/build/libraries/os/common/os_system.c @@ -18,6 +18,33 @@ #define osTPrintf(...) ((void)0) +#ifdef SDK_ARM11 +#ifdef BROM_ENABLE_SMP_CODE + +//============================================================================ +// MULTI CORE +//============================================================================ +/*---------------------------------------------------------------------------* + Name: osGetCpuID + + Description: Get CPU-ID + + Arguments: None. + + Returns: CPU-ID (field 0-3) + *---------------------------------------------------------------------------*/ +#include +asm u8 osGetCpuID( void ) +{ + mrc p15,0, r0, c0, c0, 5 + and r0, r0, #HW_C0_AP_CPU_ID_MASK + + bx lr +} +#include + +#endif // BROM_ENABLE_SMP_CODE +#endif // SDK_ARM11 //============================================================================ // PROCESSER MODE diff --git a/trunk/bootrom/include/brom/os/common/system.h b/trunk/bootrom/include/brom/os/common/system.h index f8670f7..3d6717d 100644 --- a/trunk/bootrom/include/brom/os/common/system.h +++ b/trunk/bootrom/include/brom/os/common/system.h @@ -75,8 +75,16 @@ OSProcMode; #ifdef SDK_ARM9 #define OS_SVC_STACK_SIZE 0x1000 #define OS_IRQ_STACK_SIZE 0x1000 -#else // SDK_MPCORE -#endif // SDK_MPCORE +#endif // SDK_ARM9 + +#ifdef SDK_ARM11 +#ifdef BROM_ENABLE_SMP_CODE +#define OS_INTR_CHECK_BUF_OFFSET() (-osGetCpuID()*16) +#else // BROM_ENABLE_SMP_CODE +#define OS_INTR_CHECK_BUF_OFFSET() 0 +#endif // BROM_ENABLE_SMP_CODE +#define OS_INTR_CHECK_BUF() (HW_INTR_CHECK0_BUF + OS_INTR_CHECK_BUF_OFFSET()) +#endif // SDK_ARM11 //---- sec to cpu cycle @@ -124,6 +132,27 @@ static inline u32 i_osCpuCycleToNSec( OSCpuCycle cyc ) } +//============================================================================ +// MULTI CORE +//============================================================================ +/*---------------------------------------------------------------------------* + Name: osGetCpuID + + Description: Get CPU-ID + + Arguments: None. + + Returns: CPU-ID (field 0-3) + *---------------------------------------------------------------------------*/ +#ifdef BROM_ENABLE_SMP_CODE +u8 osGetCpuID( void ); +#else // BROM_ENABLE_SMP_CODE +static inline u8 osGetCpuID( void ) +{ + return 0; +} +#endif // BROM_ENABLE_SMP_CODE + //============================================================================ // PROCESSER MODE //============================================================================