mirror of
https://github.com/rvtr/ctr_firmware.git
synced 2025-10-31 07:51:08 -04:00
暫定的にセカンドコアをWFI状態に。
git-svn-id: file:///Volumes/Transfer/gigaleak_20231201/2020-09-30%20-%20paladin.7z/paladin/ctr_firmware@74 b871894f-2f95-9b40-918c-086798483c85
This commit is contained in:
parent
e5e1085c21
commit
2062d62139
@ -108,7 +108,6 @@ asm void _start( void )
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#endif // BROM_ENABLE_DSP_WRAM
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#endif // BROM_ENABLE_DSP_WRAM
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LSYM(10)
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LSYM(10)
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b BSYM(10)
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b BSYM(10)
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}
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}
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@ -49,6 +49,29 @@ irq b STUPi_IrqHandler
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fiq b STUPi_DbgHandler
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fiq b STUPi_DbgHandler
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stupStartHandlerVeneer
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stupStartHandlerVeneer
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//---- check CPU ID
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mrc p15,0, r0, c0, c0, 5
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tst r0, #HW_C0_AP_CPU_ID_MASK
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beq core0_start
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//---- Wait for IPI
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#ifdef BROM_USE_MPCORE_EXTEND_OP
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cpsid i
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#else
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mrs r0, cpsr
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orr r1, r0, #HW_PSR_IRQ_DISABLE
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msr cpsr_c, r1
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#endif
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ldr r3, =REG_IDR_CNT_ADDR
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mov r0, #REG_OS_IDR_CNT_E_MASK
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str r0, [r3]
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LSYM(10)
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wfi
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nop
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b BSYM(10)
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core0_start
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b STUPi_StartHandler
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b STUPi_StartHandler
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}
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}
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@ -62,11 +62,6 @@ asm void STUPi_StartHandler( void )
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#endif // BROM_ENABLE_BOOTROM_WRITE
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#endif // BROM_ENABLE_BOOTROM_WRITE
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//---- set IME = 0
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// ( use that LSB of HW_REG_BASE equal to 0 )
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mov r12, #HW_REG_BASE
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str r12, [r12, #REG_IME_OFFSET]
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// init BROM prot
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// init BROM prot
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ldr r3, =REG_PROT_ADDR
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ldr r3, =REG_PROT_ADDR
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ldr r1, =4*8 // 0x1204
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ldr r1, =4*8 // 0x1204
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@ -28,6 +28,7 @@ extern "C" {
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#endif
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#endif
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//------------------------------------- BROM
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//------------------------------------- BROM
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#define HW_BROM_IMG 0x00000000
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#define HW_BROM HW_BIOS
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#define HW_BROM HW_BIOS
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#define HW_BROM_END (HW_BROM + HW_BROM_SIZE)
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#define HW_BROM_END (HW_BROM + HW_BROM_SIZE)
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#define HW_BROM_SIZE 0x10000 // 64KB
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#define HW_BROM_SIZE 0x10000 // 64KB
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@ -91,21 +91,21 @@
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0x149000,,KEYINPUT,16,rw,PAD,volatile,X,11,1,Y,10,1,L,9,1,R,8,1,DOWN,7,1,UP,6,1,LEFT,5,1,RIGHT,4,1,START,3,1,SEL,2,1,B,1,1,A,0,1,,,,,,
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0x149000,,KEYINPUT,16,rw,PAD,volatile,X,11,1,Y,10,1,L,9,1,R,8,1,DOWN,7,1,UP,6,1,LEFT,5,1,RIGHT,4,1,START,3,1,SEL,2,1,B,1,1,A,0,1,,,,,,
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0x149002,,KEYCNT,16,rw,PAD,volatile,LOGIC,15,1,INTR,14,1,X,11,1,Y,10,1,L,9,1,R,8,1,DOWN,7,1,UP,6,1,LEFT,5,1,RIGHT,4,1,START,3,1,SEL,2,1,B,1,1,A,0,1
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0x149002,,KEYCNT,16,rw,PAD,volatile,LOGIC,15,1,INTR,14,1,X,11,1,Y,10,1,L,9,1,R,8,1,DOWN,7,1,UP,6,1,LEFT,5,1,RIGHT,4,1,START,3,1,SEL,2,1,B,1,1,A,0,1
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#SPI,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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#SPI,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x142000,,SPI1CNT,16,rw,SPI,volatile,E,15,1,I,14,1,SEL,12,2,MODE,11,1,CLKMODE,10,1,BUSY,7,1,BAUDRATE,0,3,,,,,,,,,,,,,,,,,,,,,
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0x142000,,SPI1CNT,16,rw,SIO,volatile,E,15,1,I,14,1,SEL,12,2,MODE,11,1,CLKMODE,10,1,BUSY,7,1,BAUDRATE,0,3,,,,,,,,,,,,,,,,,,,,,
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0x142002,,SPI1D,8,rw,SPI,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x142002,,SPI1D,8,rw,SIO,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x143000,,SPI2CNT,16,rw,SPI,volatile,E,15,1,I,14,1,SEL,12,2,MODE,11,1,CLKMODE,10,1,BUSY,7,1,BAUDRATE,0,3,,,,,,,,,,,,,,,,,,,,,
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0x143000,,SPI2CNT,16,rw,SIO,volatile,E,15,1,I,14,1,SEL,12,2,MODE,11,1,CLKMODE,10,1,BUSY,7,1,BAUDRATE,0,3,,,,,,,,,,,,,,,,,,,,,
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0x143002,,SPI2D,8,rw,SPI,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x143002,,SPI2D,8,rw,SIO,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x14b000,,SPI3CNT,16,rw,SPI,volatile,E,15,1,I,14,1,MODE,11,1,CLKMODE,10,1,BUSY,7,1,BAUDRATE,0,3,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x14b000,,SPI3CNT,16,rw,SIO,volatile,E,15,1,I,14,1,MODE,11,1,CLKMODE,10,1,BUSY,7,1,BAUDRATE,0,3,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x14b002,,SPI3D,8,rw,SPI,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x14b002,,SPI3D,8,rw,SIO,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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#I2C,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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#I2C,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x144000,,I2C1_DAT,8,rw,OS,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x144000,,I2C1_DAT,8,rw,SIO,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x144001,,I2C1_CNT,8,rw,OS,volatile,E,7,1,I,6,1,RW,5,1,ACK,4,1,CNT,3,3,NT,2,1,START,1,1,STOP,0,1,,,,,,,,,,,,,,,,,,,,,,,,
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0x144001,,I2C1_CNT,8,rw,SIO,volatile,E,7,1,I,6,1,RW,5,1,ACK,4,1,CNT,3,3,NT,2,1,START,1,1,STOP,0,1,,,,,,,,,,,,,,,,,,,,,,,,
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0x144002,,I2C1_CNT_EX,16,rw,OS,volatile,LGCY,15,1,WT,1,1,SCL,0,1,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x144002,,I2C1_CNT_EX,16,rw,SIO,volatile,LGCY,15,1,WT,1,1,SCL,0,1,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x144004,,I2C1_SCL,16,rw,OS,volatile,HI_PRD,8,5,LO_PRD,0,5,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x144004,,I2C1_SCL,16,rw,SIO,volatile,HI_PRD,8,5,LO_PRD,0,5,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x145000,,I2C2_DAT,8,rw,OS,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x145000,,I2C2_DAT,8,rw,SIO,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x145001,,I2C2_CNT,8,rw,OS,volatile,E,7,1,I,6,1,RW,5,1,ACK,4,1,CNT,3,3,NT,2,1,START,1,1,STOP,0,1,,,,,,,,,,,,,,,,,,,,,,,,
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0x145001,,I2C2_CNT,8,rw,SIO,volatile,E,7,1,I,6,1,RW,5,1,ACK,4,1,CNT,3,3,NT,2,1,START,1,1,STOP,0,1,,,,,,,,,,,,,,,,,,,,,,,,
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0x145002,,I2C2_CNT_EX,16,rw,OS,volatile,LGCY,15,1,WT,1,1,SCL,0,1,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x145002,,I2C2_CNT_EX,16,rw,SIO,volatile,LGCY,15,1,WT,1,1,SCL,0,1,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x145004,,I2C2_SCL,16,rw,OS,volatile,HI_PRD,8,5,LO_PRD,0,5,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x145004,,I2C2_SCL,16,rw,SIO,volatile,HI_PRD,8,5,LO_PRD,0,5,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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#GPIO,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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#GPIO,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x14a000,,RCNT0_L,16,rw,EXI,volatile,RE1,15,1,RE0,14,1,I,8,1,DIR_SO,7,1,DIR_SI,6,1,DIR_SD,5,1,DIR_SC,4,1,DATA_SO,3,1,DATA_SI,2,1,DATA_SD,1,1,DATA_SC,0,1,,,,,,,,,,,,,,,
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0x14a000,,RCNT0_L,16,rw,EXI,volatile,RE1,15,1,RE0,14,1,I,8,1,DIR_SO,7,1,DIR_SI,6,1,DIR_SD,5,1,DIR_SC,4,1,DATA_SO,3,1,DATA_SI,2,1,DATA_SD,1,1,DATA_SC,0,1,,,,,,,,,,,,,,,
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0x14a002,,RCNT0_H,16,rw,EXI,volatile,DATA_R7,7,1,DATA_R6,6,1,DATA_R5,5,1,DATA_R4,4,1,DATA_R3,3,1,DATA_R2,2,1,DATA_R1,1,1,DATA_R0,0,1,,,,,,,,,,,,,,,,,,,,,,,,
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0x14a002,,RCNT0_H,16,rw,EXI,volatile,DATA_R7,7,1,DATA_R6,6,1,DATA_R5,5,1,DATA_R4,4,1,DATA_R3,3,1,DATA_R2,2,1,DATA_R1,1,1,DATA_R0,0,1,,,,,,,,,,,,,,,,,,,,,,,,
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Can't render this file because it has a wrong number of fields in line 17.
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@ -44,6 +44,18 @@ extern "C" {
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// System Control Coprocessor
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// System Control Coprocessor
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//----------------------------------------------------------------------
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//----------------------------------------------------------------------
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// Register 0.0 : ID Code
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// Register 0.1 : Cache Type
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// Register 0.3 : TLB Type
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// Register 0.5 : CPU ID
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#define HW_C0_AP_CLUSTER_ID_MASK 0x00000f00 // Cluster ID
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#define HW_C0_AP_CPU_ID_MASK 0x00000003 // CPU ID
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#define HW_C0_AP_CLUSTER_ID_SFT 8
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#define HW_C0_AP_CPU_ID_SFT 0
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// Register 1.0 : Master Control
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// Register 1.0 : Master Control
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#ifdef SDK_ARMULATOR
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#ifdef SDK_ARMULATOR
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@ -73,9 +73,7 @@ extern "C" {
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#define HW_BIOS_IMG 0x00000000
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#define HW_BIOS_IMG 0x00000000
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#define HW_BIOS 0x00010000
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#define HW_BIOS 0x00010000
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#define HW_BIOS_END (HW_BIOS + HW_BIOS_SIZE)
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#define HW_BIOS_END (HW_BIOS + HW_BIOS_SIZE)
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#define HW_BIOS_IMG_END (HW_BIOS_IMG + HW_BIOS_EX_SIZE)
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#define HW_BIOS_SIZE 0x8000 // 32KB
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#define HW_BIOS_SIZE 0x8000 // 32KB
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#define HW_BIOS_IMG_SIZE 0x8000 // 32KB
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#define HW_RESET_VECTOR HW_BIOS
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#define HW_RESET_VECTOR HW_BIOS
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