チック修正。

git-svn-id: file:///Volumes/Transfer/gigaleak_20231201/2020-09-30%20-%20paladin.7z/paladin/ctr_firmware@101 b871894f-2f95-9b40-918c-086798483c85
This commit is contained in:
nakasima 2008-12-11 11:27:21 +00:00
parent 77f8f44746
commit 01ca849543
11 changed files with 79 additions and 39 deletions

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@ -15,8 +15,10 @@
# $Rev$
# $Author$
#----------------------------------------------------------------------------
ifndef BROMSDK_COMMONDEFS_
BROMSDK_COMMONDEFS_ = TRUE
ifndef BROM_COMMONDEFS_
BROM_COMMONDEFS_ = TRUE
include $(CTRBROM_ROOT)/build/buildtools/commondefs.config
CTR_NO_STD_PCHDR = TRUE # プリコンパイルヘッダ抑止
USE_MY_RULE_BIN = TRUE
@ -147,9 +149,11 @@ else # BROM_TARGET
CRT0_O ?= crt0_app.o
endif # BROM_TARGET
ifneq ($(BROM_PROMGEN),TRUE)
ifdef BROM_DEF_LINK_SCATLD
CRT0_O += crt0_scat.o
endif # BROM_DEF_LINK_SCATLD
endif # BROM_PROMGEN
#----------------------------------------------------------------------------
### CTR-commondefs
@ -329,5 +333,5 @@ MACRO_FLAGS += -DBROM_PLATFORM_$(BROM_PLATFORM) \
#----------------------------------------------------------------------------
endif # CTRBROM_COMMONDEFS_
endif # BROM_COMMONDEFS_
#----- End of commondefs -----

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@ -0,0 +1,37 @@
#! make -f
#----------------------------------------------------------------------------
# Project: CtrBrom - commondefs - common definitions for build system
# File: commondefs
#
# Copyright 2008 Nintendo. All rights reserved.
#
# These coded instructions, statements, and computer programs contain
# proprietary information of Nintendo of America Inc. and/or Nintendo
# Company Ltd., and are protected by Federal copyright law. They may
# not be disclosed to third parties or copied or duplicated in any form,
# in whole or in part, without the prior written consent of Nintendo.
#
# $Date:: 2008-12-09#$
# $Rev: 95 $
# $Author: nakasima $
#----------------------------------------------------------------------------
ifndef BROM_COMMONDEFS_CONFIG_
BROM_COMMONDEFS_CONFIG_ = TRUE
#BROM_ENABLE_BOOTROM_WRITE = TRUE
#BROM_DEV_EARLY_RELEASE = TRUE
#BROM_DEF_LINK_SCATLD = TRUE
ifdef BROM_ENABLE_BOOTROM_WRITE
MACRO_FLAGS += -DBROM_ENABLE_BOOTROM_WRITE
endif
ifdef BROM_DEV_EARLY_RELEASE
MACRO_FLAGS += -DBROM_DEV_EARLY_RELEASE
endif
ifdef BROM_DEF_LINK_SCATLD
MACRO_FLAGS += -DBROM_DEF_LINK_SCATLD
endif
#----------------------------------------------------------------------------
endif # BROM_COMMONDEFS_CONFIG_
#----- End of commondefs -----

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@ -15,7 +15,7 @@
# $Rev$
# $Author$
#----------------------------------------------------------------------------
ifndef BROMSDK_MODULERULES_
ifndef BROM_MODULERULES_
ifdef MAKEFIRM_ARM11
@ -95,6 +95,6 @@ $(BINDIR)/$(TARGET_BIN_BASENAME).exo: $(BINDIR)/$(TARGET_BIN_BASENAME).sbin
objcopy -I binary -O srec $< $@
#----------------------------------------------------------------------------
BROMSDK_MODULERULES_ = TRUE
endif # BROMSDK_MODULERULES_
BROM_MODULERULES_ = TRUE
endif # BROM_MODULERULES_
#----- End of modulerules -----

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@ -72,7 +72,7 @@ void osInitInterrupt( void )
reg_OS_IDR_CNT = REG_OS_IDR_CNT_E_MASK;
reg_OS_CPUI_PRIO = 15 << REG_OS_CPUI_PRIO_THLD_SHIFT;
reg_OS_CPUI_BP = REG_OS_CPUI_BP_DECI_MASK;
reg_OS_CPUI_BP = HW_CPUIBP_CMP_PRIO_ALL_BITS;
reg_OS_CPUI_CNT = REG_OS_CPUI_CNT_E_MASK;
}
}

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@ -47,22 +47,13 @@ void osInitTimer( void )
{
isInit = TRUE;
osInitInterrupt();
osTimerClock = OS_TIMER_CLOCK_DEFAULT;
osDisableTimerAndWatchdog();
osStopTimer();
osStopWatchDog();
osSetInterruptHandler( OS_INTR_ID_TIMER, timer_handler );
//osSetInterruptHandler( OS_INTR_ID_TIMER, timer_handler );
//osSetInterruptHandler( OS_INTR_ID_WATCHDOG, i_osWatchdogInterruptHandler );
reg_OS_IDR_SET_IE0 = REG_OS_IDR_SET_IE0_TM_MASK;
osEnableTimerAndWatchdog();
}
}
@ -114,7 +105,7 @@ void osStartTimerWithUSec( u32 usec, u8 preScale )
{
u32 count = ((usec) * (osTimerClock / 1000)) / (preScale+1) / 1000;
i_osStartTimer( count, preScale, OS_TM_AUTO_RELOAD, OS_TM_INTR_REQ_ENABLE );
i_osStartTimer( count, preScale, OS_TM_SINGLE_SHOT, OS_TM_INTR_REQ_ENABLE );
}
/*---------------------------------------------------------------------------*
@ -131,7 +122,7 @@ void osStartTimerWithMSec( u32 msec, u8 preScale )
{
u32 count = (((msec) * osTimerClock / 1000)) / (preScale+1);
i_osStartTimer( count, preScale, OS_TM_AUTO_RELOAD, OS_TM_INTR_REQ_ENABLE );
i_osStartTimer( count, preScale, OS_TM_SINGLE_SHOT, OS_TM_INTR_REQ_ENABLE );
}
/*---------------------------------------------------------------------------*
@ -146,7 +137,7 @@ void osStartTimerWithMSec( u32 msec, u8 preScale )
void osStartTimer( u32 count, u8 preScale )
{
i_osStartTimer( count, preScale, OS_TM_AUTO_RELOAD, OS_TM_INTR_REQ_ENABLE );
i_osStartTimer( count, preScale, OS_TM_SINGLE_SHOT, OS_TM_INTR_REQ_ENABLE );
}
/*---------------------------------------------------------------------------*
@ -162,7 +153,7 @@ void osStartTimer( u32 count, u8 preScale )
void osStartWatchDog( u32 count, u8 preScale, OSWatchdogMode watchdogMode )
{
i_osStartWatchDog( count, preScale, OS_TM_AUTO_RELOAD, OS_TM_INTR_REQ_DISABLE, watchdogMode );
i_osStartWatchDog( count, preScale, OS_TM_SINGLE_SHOT, OS_TM_INTR_REQ_DISABLE, watchdogMode );
}
/*---------------------------------------------------------------------------*
@ -222,6 +213,7 @@ static void i_osStartWatchDog( u32 count, u8 preScale, OSTimerRepeat repeat, OST
void osStopTimer( void )
{
reg_OS_TM_CNT = 0;
reg_OS_TM_IF = REG_OS_TM_IF_IF_MASK;
}
/*---------------------------------------------------------------------------*
@ -237,6 +229,7 @@ void osStopTimer( void )
void osStopWatchDog( void )
{
reg_OS_WD_CNT = 0;
reg_OS_WD_IF = REG_OS_WD_IF_IF_MASK;
}

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@ -49,19 +49,7 @@ void osInitTimer( void )
{
isInit = TRUE;
osInitInterrupt();
i_osStopTimer64();
{
OSIntrMask imask = 0xffffffff;
osSetInterruptHandler( OS_INTR_ID_TIMER1, timer_handler );
}
osEnableInterruptID( OS_INTR_ID_TIMER1 );
i_osStartTimer32( OS_TIMER32_01, (u32)i_osMSecToTick32( 1 ), OS_TIMER_PRESCALER_64 );
}
}

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@ -45,8 +45,11 @@ void osInitBROM(void)
#endif // SDK_ARM9
//---- Init Interrupt
osInitInterrupt();
// osInitTimer();
//---- Init Tick
osInitTick();
}
}

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@ -65,7 +65,16 @@ void osInitTick(void)
{
i_osUseTick = TRUE;
//---- disable timer interrupt
osDisableInterruptID(OSi_TICK_IE_TIMER_ID);
osInitInterrupt();
osInitTimer();
i_osTickCounter = 0;
#ifdef SDK_ARM11
osStopTimer();
osStartTimerWithMSec(1, 0);
#else // SDK_ARM9
//---- OS reserves OSi_TICK_TIMER timer
@ -73,7 +82,6 @@ void osInitTick(void)
i_osSetTimerReserved(OSi_TICK_TIMER);
//---- setting timer
i_osTickCounter = 0;
i_osSetTimerControl(OSi_TICK_TIMER, 0);
i_osSetTimerCount((OSTimer)OSi_TICK_TIMER, (u16)0);
i_osSetTimerControl(OSi_TICK_TIMER, (u16)OSi_TICK_TIMERCONTROL);

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@ -42,6 +42,13 @@ extern "C" {
#define HW_IDR_INTR_1_N_MODEL 0x1 // The interrupt line uses the 1-N software model
#define HW_IDR_INTR_N_N_MODEL 0x0 // the N-N software model
// Binary Point Register
#define HW_CPUIBP_CMP_PRIO_ALL_BITS 3 // All priority bits are compared for pre-emption
#define HW_CPUIBP_CMP_PRIO_7_5 4 // Only bits [7:5] of priority are compared for pre-emption
#define HW_CPUIBP_CMP_PRIO_7_6 5 // Only bits [7:6] of priority are compared for pre-emption
#define HW_CPUIBP_CMP_PRIO_7 6 // Only bits [7] of priority are compared for pre-emption
#define HW_CPUIBP_NO_PREEMPT 7 // No pre-emption is performed
typedef struct
{

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@ -424,11 +424,11 @@ $OS:HW_MPCORE_REG,,,,,,,,,,,,,,,
0x0600,,TM_LD,32,rw,OS,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
0x0604,,TM_COUNT,32,rw,OS,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
0x0608,,TM_CNT,32,rw,OS,volatile,PS,8,8,IT,2,1,RLD,1,1,E,0,1,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
0x060c,,TM_INT,32,rw,OS,volatile,IF,0,1,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
0x060c,,TM_IF,32,rw,OS,volatile,IF,0,1,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
0x0620,,WD_LD,32,rw,OS,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
0x0624,,WD_COUNT,32,rw,OS,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
0x0628,,WD_CNT,32,rw,OS,volatile,PS,8,8,M,3,1,IT,2,1,RLD,1,1,E,0,1,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
0x062c,,WD_INT,32,rw,OS,volatile,IF,0,1,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
0x062c,,WD_IF,32,rw,OS,volatile,IF,0,1,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
0x0630,,WD_RST,32,rw,OS,volatile,IF,0,1,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
0x0634,,WD_DIS,32,w,OS,volatile
#SDƒCƒ“ƒ^<5E>[ƒtƒF<C692>[ƒX2,,,,,,

Can't render this file because it has a wrong number of fields in line 17.

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@ -481,7 +481,7 @@ ifeq ($(CODEGEN_PROC),ARM11)
CTR_LIBS ?= libfx$(CTR_LIBSUFFIX).a \
libgx$(CTR_LIBSUFFIX).a \
libos$(TS_VERSION)$(CTR_LIBSUFFIX).a \
libos$$(CTR_LIBSUFFIX).a \
libmi$(CTR_LIBSUFFIX).a \
libsnd$(CTR_LIBSUFFIX).a \
libpxi$(CTR_LIBSUFFIX).a \
@ -489,7 +489,7 @@ CTR_LIBS ?= libfx$(CTR_LIBSUFFIX).a \
libfs$(CTR_LIBSUFFIX).a \
libdgt$(CTR_LIBSUFFIX).a \
libcp$(CTR_LIBSUFFIX).a \
libspi$(TS_VERSION)$(CTR_LIBSUFFIX).a \
libspi$(CTR_LIBSUFFIX).a \
librtc$(CTR_LIBSUFFIX).a \
libprc$(CTR_LIBSUFFIX).a \
libcard$(CTR_LIBSUFFIX).a \
@ -522,7 +522,7 @@ CTR_LIBS ?= libos_sp$(CTR_LIBSUFFIX).a \
libspi_sp$(CTR_LIBSUFFIX).a \
libtp_sp$(CTR_LIBSUFFIX).a \
libnvram_sp$(CTR_LIBSUFFIX).a \
libmic_sp$(TS_VERSION)$(CTR_LIBSUFFIX).a \
libmic_sp$(CTR_LIBSUFFIX).a \
libpm_sp$(CTR_LIBSUFFIX).a \
libctrdg_sp$(CTR_LIBSUFFIX).a \
libwvr_sp$(CTR_LIBSUFFIX).a \