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https://github.com/rvtr/ctr_firmware.git
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チック修正。
git-svn-id: file:///Volumes/Transfer/gigaleak_20231201/2020-09-30%20-%20paladin.7z/paladin/ctr_firmware@101 b871894f-2f95-9b40-918c-086798483c85
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@ -15,8 +15,10 @@
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# $Rev$
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# $Author$
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#----------------------------------------------------------------------------
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ifndef BROMSDK_COMMONDEFS_
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BROMSDK_COMMONDEFS_ = TRUE
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ifndef BROM_COMMONDEFS_
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BROM_COMMONDEFS_ = TRUE
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include $(CTRBROM_ROOT)/build/buildtools/commondefs.config
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CTR_NO_STD_PCHDR = TRUE # プリコンパイルヘッダ抑止
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USE_MY_RULE_BIN = TRUE
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@ -147,9 +149,11 @@ else # BROM_TARGET
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CRT0_O ?= crt0_app.o
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endif # BROM_TARGET
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ifneq ($(BROM_PROMGEN),TRUE)
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ifdef BROM_DEF_LINK_SCATLD
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CRT0_O += crt0_scat.o
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endif # BROM_DEF_LINK_SCATLD
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endif # BROM_PROMGEN
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#----------------------------------------------------------------------------
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### CTR-commondefs
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@ -329,5 +333,5 @@ MACRO_FLAGS += -DBROM_PLATFORM_$(BROM_PLATFORM) \
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#----------------------------------------------------------------------------
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endif # CTRBROM_COMMONDEFS_
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endif # BROM_COMMONDEFS_
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#----- End of commondefs -----
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37
trunk/bootrom/build/buildtools/commondefs.config
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37
trunk/bootrom/build/buildtools/commondefs.config
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@ -0,0 +1,37 @@
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#! make -f
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#----------------------------------------------------------------------------
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# Project: CtrBrom - commondefs - common definitions for build system
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# File: commondefs
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#
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# Copyright 2008 Nintendo. All rights reserved.
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#
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# These coded instructions, statements, and computer programs contain
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# proprietary information of Nintendo of America Inc. and/or Nintendo
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# Company Ltd., and are protected by Federal copyright law. They may
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# not be disclosed to third parties or copied or duplicated in any form,
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# in whole or in part, without the prior written consent of Nintendo.
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#
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# $Date:: 2008-12-09#$
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# $Rev: 95 $
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# $Author: nakasima $
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#----------------------------------------------------------------------------
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ifndef BROM_COMMONDEFS_CONFIG_
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BROM_COMMONDEFS_CONFIG_ = TRUE
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#BROM_ENABLE_BOOTROM_WRITE = TRUE
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#BROM_DEV_EARLY_RELEASE = TRUE
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#BROM_DEF_LINK_SCATLD = TRUE
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ifdef BROM_ENABLE_BOOTROM_WRITE
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MACRO_FLAGS += -DBROM_ENABLE_BOOTROM_WRITE
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endif
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ifdef BROM_DEV_EARLY_RELEASE
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MACRO_FLAGS += -DBROM_DEV_EARLY_RELEASE
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endif
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ifdef BROM_DEF_LINK_SCATLD
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MACRO_FLAGS += -DBROM_DEF_LINK_SCATLD
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endif
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#----------------------------------------------------------------------------
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endif # BROM_COMMONDEFS_CONFIG_
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#----- End of commondefs -----
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@ -15,7 +15,7 @@
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# $Rev$
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# $Author$
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#----------------------------------------------------------------------------
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ifndef BROMSDK_MODULERULES_
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ifndef BROM_MODULERULES_
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ifdef MAKEFIRM_ARM11
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@ -95,6 +95,6 @@ $(BINDIR)/$(TARGET_BIN_BASENAME).exo: $(BINDIR)/$(TARGET_BIN_BASENAME).sbin
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objcopy -I binary -O srec $< $@
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#----------------------------------------------------------------------------
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BROMSDK_MODULERULES_ = TRUE
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endif # BROMSDK_MODULERULES_
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BROM_MODULERULES_ = TRUE
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endif # BROM_MODULERULES_
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#----- End of modulerules -----
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@ -72,7 +72,7 @@ void osInitInterrupt( void )
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reg_OS_IDR_CNT = REG_OS_IDR_CNT_E_MASK;
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reg_OS_CPUI_PRIO = 15 << REG_OS_CPUI_PRIO_THLD_SHIFT;
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reg_OS_CPUI_BP = REG_OS_CPUI_BP_DECI_MASK;
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reg_OS_CPUI_BP = HW_CPUIBP_CMP_PRIO_ALL_BITS;
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reg_OS_CPUI_CNT = REG_OS_CPUI_CNT_E_MASK;
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}
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}
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@ -47,22 +47,13 @@ void osInitTimer( void )
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{
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isInit = TRUE;
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osInitInterrupt();
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osTimerClock = OS_TIMER_CLOCK_DEFAULT;
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osDisableTimerAndWatchdog();
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osStopTimer();
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osStopWatchDog();
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osSetInterruptHandler( OS_INTR_ID_TIMER, timer_handler );
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//osSetInterruptHandler( OS_INTR_ID_TIMER, timer_handler );
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//osSetInterruptHandler( OS_INTR_ID_WATCHDOG, i_osWatchdogInterruptHandler );
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reg_OS_IDR_SET_IE0 = REG_OS_IDR_SET_IE0_TM_MASK;
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osEnableTimerAndWatchdog();
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}
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}
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@ -114,7 +105,7 @@ void osStartTimerWithUSec( u32 usec, u8 preScale )
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{
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u32 count = ((usec) * (osTimerClock / 1000)) / (preScale+1) / 1000;
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i_osStartTimer( count, preScale, OS_TM_AUTO_RELOAD, OS_TM_INTR_REQ_ENABLE );
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i_osStartTimer( count, preScale, OS_TM_SINGLE_SHOT, OS_TM_INTR_REQ_ENABLE );
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}
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/*---------------------------------------------------------------------------*
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@ -131,7 +122,7 @@ void osStartTimerWithMSec( u32 msec, u8 preScale )
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{
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u32 count = (((msec) * osTimerClock / 1000)) / (preScale+1);
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i_osStartTimer( count, preScale, OS_TM_AUTO_RELOAD, OS_TM_INTR_REQ_ENABLE );
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i_osStartTimer( count, preScale, OS_TM_SINGLE_SHOT, OS_TM_INTR_REQ_ENABLE );
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}
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/*---------------------------------------------------------------------------*
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@ -146,7 +137,7 @@ void osStartTimerWithMSec( u32 msec, u8 preScale )
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void osStartTimer( u32 count, u8 preScale )
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{
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i_osStartTimer( count, preScale, OS_TM_AUTO_RELOAD, OS_TM_INTR_REQ_ENABLE );
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i_osStartTimer( count, preScale, OS_TM_SINGLE_SHOT, OS_TM_INTR_REQ_ENABLE );
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}
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/*---------------------------------------------------------------------------*
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@ -162,7 +153,7 @@ void osStartTimer( u32 count, u8 preScale )
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void osStartWatchDog( u32 count, u8 preScale, OSWatchdogMode watchdogMode )
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{
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i_osStartWatchDog( count, preScale, OS_TM_AUTO_RELOAD, OS_TM_INTR_REQ_DISABLE, watchdogMode );
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i_osStartWatchDog( count, preScale, OS_TM_SINGLE_SHOT, OS_TM_INTR_REQ_DISABLE, watchdogMode );
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}
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/*---------------------------------------------------------------------------*
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@ -222,6 +213,7 @@ static void i_osStartWatchDog( u32 count, u8 preScale, OSTimerRepeat repeat, OST
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void osStopTimer( void )
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{
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reg_OS_TM_CNT = 0;
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reg_OS_TM_IF = REG_OS_TM_IF_IF_MASK;
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}
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/*---------------------------------------------------------------------------*
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@ -237,6 +229,7 @@ void osStopTimer( void )
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void osStopWatchDog( void )
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{
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reg_OS_WD_CNT = 0;
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reg_OS_WD_IF = REG_OS_WD_IF_IF_MASK;
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}
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@ -49,19 +49,7 @@ void osInitTimer( void )
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{
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isInit = TRUE;
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osInitInterrupt();
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i_osStopTimer64();
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{
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OSIntrMask imask = 0xffffffff;
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osSetInterruptHandler( OS_INTR_ID_TIMER1, timer_handler );
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}
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osEnableInterruptID( OS_INTR_ID_TIMER1 );
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i_osStartTimer32( OS_TIMER32_01, (u32)i_osMSecToTick32( 1 ), OS_TIMER_PRESCALER_64 );
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}
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}
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@ -45,8 +45,11 @@ void osInitBROM(void)
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#endif // SDK_ARM9
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//---- Init Interrupt
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osInitInterrupt();
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// osInitTimer();
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//---- Init Tick
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osInitTick();
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}
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}
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@ -65,7 +65,16 @@ void osInitTick(void)
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{
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i_osUseTick = TRUE;
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//---- disable timer interrupt
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osDisableInterruptID(OSi_TICK_IE_TIMER_ID);
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osInitInterrupt();
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osInitTimer();
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i_osTickCounter = 0;
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#ifdef SDK_ARM11
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osStopTimer();
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osStartTimerWithMSec(1, 0);
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#else // SDK_ARM9
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//---- OS reserves OSi_TICK_TIMER timer
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@ -73,7 +82,6 @@ void osInitTick(void)
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i_osSetTimerReserved(OSi_TICK_TIMER);
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//---- setting timer
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i_osTickCounter = 0;
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i_osSetTimerControl(OSi_TICK_TIMER, 0);
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i_osSetTimerCount((OSTimer)OSi_TICK_TIMER, (u16)0);
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i_osSetTimerControl(OSi_TICK_TIMER, (u16)OSi_TICK_TIMERCONTROL);
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@ -42,6 +42,13 @@ extern "C" {
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#define HW_IDR_INTR_1_N_MODEL 0x1 // The interrupt line uses the 1-N software model
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#define HW_IDR_INTR_N_N_MODEL 0x0 // the N-N software model
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// Binary Point Register
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#define HW_CPUIBP_CMP_PRIO_ALL_BITS 3 // All priority bits are compared for pre-emption
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#define HW_CPUIBP_CMP_PRIO_7_5 4 // Only bits [7:5] of priority are compared for pre-emption
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#define HW_CPUIBP_CMP_PRIO_7_6 5 // Only bits [7:6] of priority are compared for pre-emption
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#define HW_CPUIBP_CMP_PRIO_7 6 // Only bits [7] of priority are compared for pre-emption
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#define HW_CPUIBP_NO_PREEMPT 7 // No pre-emption is performed
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typedef struct
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{
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@ -424,11 +424,11 @@ $OS:HW_MPCORE_REG,,,,,,,,,,,,,,,
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0x0600,,TM_LD,32,rw,OS,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x0604,,TM_COUNT,32,rw,OS,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x0608,,TM_CNT,32,rw,OS,volatile,PS,8,8,IT,2,1,RLD,1,1,E,0,1,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x060c,,TM_INT,32,rw,OS,volatile,IF,0,1,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x060c,,TM_IF,32,rw,OS,volatile,IF,0,1,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x0620,,WD_LD,32,rw,OS,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x0624,,WD_COUNT,32,rw,OS,volatile,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x0628,,WD_CNT,32,rw,OS,volatile,PS,8,8,M,3,1,IT,2,1,RLD,1,1,E,0,1,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x062c,,WD_INT,32,rw,OS,volatile,IF,0,1,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x062c,,WD_IF,32,rw,OS,volatile,IF,0,1,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x0630,,WD_RST,32,rw,OS,volatile,IF,0,1,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
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0x0634,,WD_DIS,32,w,OS,volatile
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#SDƒCƒ“ƒ^<5E>[ƒtƒF<C692>[ƒX2,,,,,,
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Can't render this file because it has a wrong number of fields in line 17.
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@ -481,7 +481,7 @@ ifeq ($(CODEGEN_PROC),ARM11)
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CTR_LIBS ?= libfx$(CTR_LIBSUFFIX).a \
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libgx$(CTR_LIBSUFFIX).a \
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libos$(TS_VERSION)$(CTR_LIBSUFFIX).a \
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libos$$(CTR_LIBSUFFIX).a \
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libmi$(CTR_LIBSUFFIX).a \
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libsnd$(CTR_LIBSUFFIX).a \
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libpxi$(CTR_LIBSUFFIX).a \
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@ -489,7 +489,7 @@ CTR_LIBS ?= libfx$(CTR_LIBSUFFIX).a \
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libfs$(CTR_LIBSUFFIX).a \
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libdgt$(CTR_LIBSUFFIX).a \
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libcp$(CTR_LIBSUFFIX).a \
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libspi$(TS_VERSION)$(CTR_LIBSUFFIX).a \
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libspi$(CTR_LIBSUFFIX).a \
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librtc$(CTR_LIBSUFFIX).a \
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libprc$(CTR_LIBSUFFIX).a \
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libcard$(CTR_LIBSUFFIX).a \
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@ -522,7 +522,7 @@ CTR_LIBS ?= libos_sp$(CTR_LIBSUFFIX).a \
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libspi_sp$(CTR_LIBSUFFIX).a \
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libtp_sp$(CTR_LIBSUFFIX).a \
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libnvram_sp$(CTR_LIBSUFFIX).a \
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libmic_sp$(TS_VERSION)$(CTR_LIBSUFFIX).a \
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libmic_sp$(CTR_LIBSUFFIX).a \
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libpm_sp$(CTR_LIBSUFFIX).a \
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libctrdg_sp$(CTR_LIBSUFFIX).a \
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libwvr_sp$(CTR_LIBSUFFIX).a \
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