mirror of
https://github.com/rvtr/TwlIPL.git
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ef7303caaa
AES領域二つ目対応、 バッテリ切れ時に電源OFFするように修正(FINALROM時のみ)、 セキュリティOFF設定の追加(デフォルト無効)、 SDドライバのDMAを0、1に変更 git-svn-id: file:///Users/lillianskinner/Downloads/platinum/twl/TwlIPL/trunk@696 b08762b0-b915-fc4b-9d8c-17b2551a87ff
323 lines
12 KiB
C
323 lines
12 KiB
C
/*---------------------------------------------------------------------------*
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Project: TwlFirm - gcdfirm - sdmc-launcher
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File: main.c
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Copyright 2007 Nintendo. All rights reserved.
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These coded instructions, statements, and computer programs contain
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proprietary information of Nintendo of America Inc. and/or Nintendo
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Company Ltd., and are protected by Federal copyright law. They may
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not be disclosed to third parties or copied or duplicated in any form,
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in whole or in part, without the prior written consent of Nintendo.
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$Date:: $
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$Rev$
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$Author$
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*---------------------------------------------------------------------------*/
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#include <firm.h>
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#define RSA_KEY_ADDR rsa_key
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#ifndef FIRM_USE_TWLSDK_KEYS
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static const u8 rsa_key[128] =
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{
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0xC7, 0x94, 0x50, 0x00, 0x3A, 0xE1, 0x0E, 0x6C, 0xA8, 0xD1, 0xC0, 0x2D, 0x77, 0xB7, 0x6D, 0xBC,
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0x31, 0xDB, 0x12, 0x08, 0x09, 0x0D, 0x2A, 0xE8, 0xC9, 0x1A, 0x2B, 0x6E, 0x6C, 0x85, 0x78, 0xD7,
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0x46, 0x50, 0x05, 0xB5, 0xCC, 0x3B, 0xEC, 0xBA, 0xF4, 0xDE, 0xC2, 0x13, 0x13, 0xBE, 0x67, 0xEE,
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0x85, 0x19, 0xEB, 0x62, 0xB3, 0x5C, 0x09, 0xA8, 0x54, 0x44, 0x26, 0x85, 0x25, 0xEA, 0xE5, 0x85,
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0xD1, 0xB5, 0xCE, 0xA0, 0xFF, 0x6B, 0x61, 0xCA, 0x94, 0xC1, 0x67, 0xBE, 0xC0, 0x7E, 0x3B, 0xFF,
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0x12, 0x9B, 0x79, 0xDB, 0xAC, 0xD3, 0x5A, 0x3F, 0x14, 0x37, 0x49, 0xA8, 0x7C, 0x2F, 0x07, 0xF4,
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0x8B, 0xA9, 0x8B, 0x8D, 0xB2, 0x60, 0xA5, 0xD5, 0x64, 0xEE, 0xCF, 0x3F, 0x32, 0xEE, 0x77, 0xAC,
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0x27, 0x75, 0x2B, 0x04, 0xD7, 0x26, 0xA8, 0x8A, 0x55, 0x2A, 0x76, 0xE5, 0x68, 0x80, 0x57, 0x85
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};
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#else
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static const u8 rsa_key[128] =
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{
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0xAC, 0x93, 0xBB,
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0x3C, 0x15, 0x5C, 0x5F, 0x25, 0xB0, 0x4C, 0x37, 0xA4, 0x2D, 0x85, 0x29, 0x1D, 0x7A, 0x9D, 0x2D,
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0xD5, 0x79, 0xB5, 0x5D, 0xB1, 0x08, 0x20, 0x9C, 0xF0, 0x4C, 0x56, 0x27, 0x97, 0xF8, 0x7E, 0x3E,
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0xCB, 0x94, 0x06, 0x05, 0x94, 0x00, 0x92, 0x9B, 0xB0, 0x5B, 0x06, 0xF6, 0xAF, 0xAA, 0x9C, 0xA5,
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0xF0, 0x11, 0xA7, 0x8A, 0xCB, 0x0C, 0x11, 0xD6, 0x0C, 0x3D, 0x30, 0xAC, 0x51, 0x79, 0x5A, 0xB5,
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0x7F, 0x11, 0x92, 0x74, 0x48, 0x82, 0x81, 0xBF, 0x3B, 0xFA, 0x93, 0xBF, 0x6B, 0x5B, 0x3F, 0x86,
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0x96, 0x4F, 0xCC, 0x90, 0x12, 0xB2, 0x39, 0x8D, 0x68, 0x16, 0x7B, 0xC6, 0x87, 0xF1, 0xF5, 0x60,
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0x62, 0x39, 0xFB, 0x10, 0x7E, 0x48, 0x7F, 0xDD, 0x82, 0x38, 0x38, 0x76, 0xB5, 0xCE, 0x21, 0x4B,
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0xC9, 0x6F, 0x31, 0x8D, 0x23, 0x57, 0x3D, 0xB6, 0x6C, 0xEE, 0xC2, 0x0D, 0x11
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};
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#endif
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#define RSA_HEAP_SIZE (4*1024) // RSA<53>p<EFBFBD>q<EFBFBD>[<5B>v<EFBFBD>T<EFBFBD>C<EFBFBD>Y (<28>T<EFBFBD>C<EFBFBD>Y<EFBFBD><59><EFBFBD><EFBFBD><EFBFBD>K<EFBFBD>v)
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static u8 acHeap[RSA_HEAP_SIZE] __attribute__ ((aligned (32)));
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static SVCSignHeapContext acPool;
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#define MENU_FILE "sdmc:/menu.srl"
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/*
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PROFILE_ENABLE <20><><EFBFBD><EFBFBD><EFBFBD>`<60><><EFBFBD><EFBFBD><EFBFBD>Ƃ<EFBFBD><C682><EFBFBD><EFBFBD><EFBFBD><EFBFBD>x<EFBFBD>̃p<CC83>t<EFBFBD>H<EFBFBD>[<5B>}<7D><><EFBFBD>X<EFBFBD>`<60>F<EFBFBD>b<EFBFBD>N<EFBFBD><4E><EFBFBD>ł<EFBFBD><C582>܂<EFBFBD><DC82>B
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<20><><EFBFBD>p<EFBFBD><70><EFBFBD>邽<EFBFBD>߂ɂ́Amain.c<><63><EFBFBD>ǂ<EFBFBD><C782><EFBFBD><EFBFBD>ɁAu32 profile[256]; u32 pf_cnt = 0; <20><>
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<20><><EFBFBD>`<60><><EFBFBD><EFBFBD><EFBFBD>K<EFBFBD>v<EFBFBD><76><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>܂<EFBFBD><DC82>B
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*/
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#define PROFILE_ENABLE
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/*
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PRINT_MEMORY_ADDR <20><><EFBFBD><EFBFBD><EFBFBD>`<60><><EFBFBD><EFBFBD><EFBFBD>ƁA<C681><41><EFBFBD>̃A<CC83>h<EFBFBD><68><EFBFBD>X<EFBFBD><58><EFBFBD><EFBFBD>SPrintf<74><66><EFBFBD>s<EFBFBD><73><EFBFBD>܂<EFBFBD>(<28><><EFBFBD>̃t<CC83>@<40>C<EFBFBD><43><EFBFBD>̂<EFBFBD>)
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FINALROM<4F>łł<C582><C582>R<EFBFBD>[<5B>h<EFBFBD><68><EFBFBD>c<EFBFBD><63><EFBFBD>̂Œ<CC82><C592>ӂ<EFBFBD><D382>Ă<EFBFBD><C482><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>B
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*/
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//#define PRINT_MEMORY_ADDR 0x02FFC000
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//#ifdef SDK_FINALROM // FINALROM<4F>Ŗ<EFBFBD><C596><EFBFBD><EFBFBD><EFBFBD>
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//#undef PROFILE_ENABLE
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//#endif
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#ifdef PROFILE_ENABLE
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#define PROFILE_MAX 16
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u32 profile[PROFILE_MAX];
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u32 pf_cnt = 0;
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#define PUSH_PROFILE() (profile[pf_cnt++] = (u32)OS_TicksToMicroSeconds(OS_GetTick()))
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#else
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#define PUSH_PROFILE() ((void)0)
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#endif
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#ifdef PRINT_MEMORY_ADDR
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static char* debugPtr = (char*)PRINT_MEMORY_ADDR;
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#undef OS_TPrintf
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//#define OS_TPrintf(...) (debugPtr = (char*)((u32)(debugPtr + STD_TSPrintf(debugPtr, __VA_ARGS__) + 0xf) & ~0xf))
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#define OS_TPrintf(...) (debugPtr += STD_TSPrintf(debugPtr, __VA_ARGS__))
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#endif
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/***************************************************************
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PreInit
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FromBoot<6F>̑Ή<CC91><CE89><EFBFBD>OS_Init<69>O<EFBFBD>ɕK<C995>v<EFBFBD>ȃ<EFBFBD><C883>C<EFBFBD><43><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>̏<EFBFBD><CC8F><EFBFBD><EFBFBD><EFBFBD>
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***************************************************************/
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static void PreInit(void)
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{
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static const OSMountInfo firmSettings[] =
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{
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// drive device target pertitionIdx resource userPermission rsvA B archive path
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{ 'A', OS_MOUNT_DEVICE_SD, OS_MOUNT_TGT_ROOT, 0, OS_MOUNT_RSC_MMEM, (OS_MOUNT_USR_R|OS_MOUNT_USR_W), 0, 0, "sdmc", "/" },
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{ 'B', OS_MOUNT_DEVICE_NAND, OS_MOUNT_TGT_ROOT, 0, OS_MOUNT_RSC_WRAM, (OS_MOUNT_USR_R|OS_MOUNT_USR_W), 0, 0, "nand", "/" }, // <20><><EFBFBD>[<5B>U<EFBFBD>[<5B>A<EFBFBD>v<EFBFBD><76><EFBFBD>͂<EFBFBD><CD82>̃A<CC83>[<5B>J<EFBFBD>C<EFBFBD>u<EFBFBD>ł<EFBFBD>Write<74>s<EFBFBD><73>
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{ 'C', OS_MOUNT_DEVICE_NAND, OS_MOUNT_TGT_ROOT, 1, OS_MOUNT_RSC_WRAM, (OS_MOUNT_USR_R|OS_MOUNT_USR_W), 0, 0, "nand2", "/" }, // <20><><EFBFBD>[<5B>U<EFBFBD>[<5B>A<EFBFBD>v<EFBFBD><76><EFBFBD>͂<EFBFBD><CD82>̃A<CC83>[<5B>J<EFBFBD>C<EFBFBD>u<EFBFBD>ł<EFBFBD>Write<74>s<EFBFBD><73>
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{ 'D', OS_MOUNT_DEVICE_NAND, OS_MOUNT_TGT_DIR, 0, OS_MOUNT_RSC_MMEM, (OS_MOUNT_USR_R|OS_MOUNT_USR_W), 0, 0, "shared2", "nand2:/shared2" },
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{ 'E', OS_MOUNT_DEVICE_NAND, OS_MOUNT_TGT_DIR, 0, OS_MOUNT_RSC_MMEM, (OS_MOUNT_USR_R|OS_MOUNT_USR_W), 0, 0, "photo", "nand2:/photo" },
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{ 0 }
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};
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/*
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<20><><EFBFBD>C<EFBFBD><43><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>֘A
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*/
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// SHARED<45>̈<EFBFBD><CC88>N<EFBFBD><4E><EFBFBD>A
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MI_CpuClearFast((void *)HW_WRAM_EX_LOCK_BUF, (HW_WRAM_EX_LOCK_BUF_END - HW_WRAM_EX_LOCK_BUF));
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MI_CpuClearFast((void *)HW_BIOS_EXCP_STACK_MAIN, (HW_REAL_TIME_CLOCK_BUF - HW_BIOS_EXCP_STACK_MAIN));
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MI_CpuClearFast((void *)HW_PXI_SIGNAL_PARAM_ARM9, (HW_MMEMCHECKER_MAIN - HW_PXI_SIGNAL_PARAM_ARM9));
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MI_CpuClearFast((void*)HW_ROM_HEADER_BUF, (HW_ROM_HEADER_BUF_END-HW_ROM_HEADER_BUF));
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// FS_MOUNT<4E>̈<EFBFBD><CC88>̏<EFBFBD><CC8F><EFBFBD><EFBFBD><EFBFBD>
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MI_CpuCopy8(firmSettings, (char*)HW_TWL_FS_MOUNT_INFO_BUF, sizeof(firmSettings));
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/*
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FromBrom<6F>֘A
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*/
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if ( !OSi_FromBromToMenu() )
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{
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OS_Terminate();
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}
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// <20>u<EFBFBD>[<5B>g<EFBFBD>^<5E>C<EFBFBD>v<EFBFBD>̕ύX
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( (OSBootInfo *)OS_GetBootInfo() )->boot_type = OS_BOOTTYPE_NAND;
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}
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/***************************************************************
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PostInit
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<20>e<EFBFBD>평<EFBFBD><ED8F89><EFBFBD><EFBFBD>
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***************************************************************/
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static void PostInit(void)
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{
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// RSA<53>p<EFBFBD>q<EFBFBD>[<5B>v<EFBFBD>ݒ<EFBFBD>
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SVC_InitSignHeap( &acPool, acHeap, sizeof(acHeap) );
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// HMAC<41>p<EFBFBD><70><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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FS_SetDigestKey( NULL );
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// FS/FATFS<46><53><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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FS_InitFIRM();
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}
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/***************************************************************
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CheckHeader
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<20>w<EFBFBD>b<EFBFBD>_<EFBFBD><5F><EFBFBD>V<EFBFBD>X<EFBFBD>e<EFBFBD><65><EFBFBD><EFBFBD><EFBFBD>j<EFBFBD><6A><EFBFBD>[<5B>Ƃ<EFBFBD><C682>Ė<EFBFBD><C496><EFBFBD><EFBFBD>Ȃ<EFBFBD><C882><EFBFBD><EFBFBD>`<60>F<EFBFBD>b<EFBFBD>N
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***************************************************************/
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static BOOL CheckHeader(void)
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{
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static ROM_Header_Short* const rhs = (ROM_Header_Short*)HW_TWL_ROM_HEADER_BUF;
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// <20>C<EFBFBD>j<EFBFBD>V<EFBFBD><56><EFBFBD><EFBFBD><EFBFBD>R<EFBFBD>[<5B>h<EFBFBD>Ȃ<EFBFBD>
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OS_TPrintf("Initial Code : %08X (%.4s)\n", *(u32*)rhs->game_code, rhs->game_code);
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OS_TPrintf("Platform Code : %02X\n", rhs->platform_code);
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OS_TPrintf("Codec Mode : %s\n", rhs->codec_mode ? "TWL" : "NITRO");
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OS_TPrintf("Sigunature : %s\n", rhs->enable_signature ? "AVAILABLE" : "NOT AVAILABLE");
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OS_TPrintf("AES Encryption : %s\n", rhs->enable_aes ? "AVAILABLE" : "NOT AVAILABLE");
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if ( rhs->enable_aes )
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{
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OS_TPrintf("AES Key Type : %s\n", rhs->developer_encrypt ? "FOR DEVELOPMENT" : "FOR PRODUCT");
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}
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// <20>G<EFBFBD><47><EFBFBD>g<EFBFBD><67><EFBFBD>|<7C>C<EFBFBD><43><EFBFBD>g
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OS_TPrintf("ARM9 Entry point : %08X\n", rhs->main_entry_address);
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OS_TPrintf("ARM7 Entry point : %08X\n", rhs->sub_entry_address);
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// <20><><EFBFBD>[<5B>h<EFBFBD>͈<EFBFBD>
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OS_TPrintf("ARM9 ROM address : %08X\n", rhs->main_rom_offset);
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OS_TPrintf("ARM9 RAM address : %08X\n", rhs->main_ram_address);
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OS_TPrintf("ARM9 size : %08X\n", rhs->main_size);
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OS_TPrintf("ARM7 ROM address : %08X\n", rhs->sub_rom_offset);
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OS_TPrintf("ARM7 RAM address : %08X\n", rhs->sub_ram_address);
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OS_TPrintf("ARM7 size : %08X\n", rhs->sub_size);
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OS_TPrintf("ARM9 LTD ROM address: %08X\n", rhs->main_ltd_rom_offset);
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OS_TPrintf("ARM9 LTD RAM address: %08X\n", rhs->main_ltd_ram_address);
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OS_TPrintf("ARM9 LTD size : %08X\n", rhs->main_ltd_size);
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OS_TPrintf("ARM7 LTD ROM address: %08X\n", rhs->sub_ltd_rom_offset);
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OS_TPrintf("ARM7 LTD RAM address: %08X\n", rhs->sub_ltd_ram_address);
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OS_TPrintf("ARM7 LTD size : %08X\n", rhs->sub_ltd_size);
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// <20><><EFBFBD><EFBFBD><EFBFBD>قڍœK<C593><4B><EFBFBD>ς<EFBFBD>
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#ifndef FIRM_USE_TWLSDK_KEYS
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if ( rhs->platform_code != PLATFORM_CODE_TWL_LIMITED || // TWL Limited only
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!rhs->enable_signature || // Should be use ROM header signature
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#else
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if ( // no check
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#endif
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!rhs->codec_mode || // TWL mode only
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// should be in main memory
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HW_TWL_MAIN_MEM > (u32)rhs->main_ram_address ||
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HW_TWL_MAIN_MEM > (u32)rhs->sub_ram_address ||
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HW_TWL_MAIN_MEM > (u32)rhs->main_ltd_ram_address ||
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HW_TWL_MAIN_MEM > (u32)rhs->sub_ltd_ram_address ||
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// should be in static area without Limited region
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(u32)rhs->main_ram_address > (u32)rhs->main_entry_address ||
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(u32)rhs->sub_ram_address > (u32)rhs->sub_entry_address ||
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// should be in main memory (end address)
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HW_TWL_MAIN_MEM_END <= (u32)rhs->main_ram_address + rhs->main_size ||
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HW_TWL_MAIN_MEM_END <= (u32)rhs->sub_ram_address + rhs->sub_size ||
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HW_TWL_MAIN_MEM_END <= (u32)rhs->main_ltd_ram_address + rhs->main_ltd_size ||
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HW_TWL_MAIN_MEM_END <= (u32)rhs->sub_ltd_ram_address + rhs->sub_ltd_size ||
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// should be in static area without Limited region (end address)
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(u32)rhs->main_ram_address + rhs->main_size <= (u32)rhs->main_entry_address ||
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(u32)rhs->sub_ram_address + rhs->sub_size <= (u32)rhs->sub_entry_address ||
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0 )
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{
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OS_TPrintf("Invalid ROM header for SDMC Launcher!\n");
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return FALSE;
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}
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return TRUE;
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}
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/***************************************************************
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EraseAll
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<20>s<EFBFBD><73><EFBFBD>I<EFBFBD><49><EFBFBD><EFBFBD><EFBFBD>܂<EFBFBD><DC82><EFBFBD>
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<20><><EFBFBD>낢<EFBFBD><EB82A2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ă<EFBFBD><C482><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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DS<44><53><EFBFBD>[<5B>h<EFBFBD>ɂ<EFBFBD><C982>ďI<C48F><49><EFBFBD><EFBFBD><EFBFBD>̂<EFBFBD><CC82>悢<EFBFBD><E682A2><EFBFBD>H
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***************************************************************/
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static void EraseAll(void)
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{
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MI_CpuClearFast( OSi_GetFromFirmAddr(), sizeof(OSFromFirmBuf) );
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#ifdef SDK_FINALROM
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MI_CpuClearFast( (void*)HW_TWL_ROM_HEADER_BUF, HW_TWL_ROM_HEADER_BUF_SIZE );
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MI_CpuClearFast( (void*)HW_ROM_HEADER_BUF, HW_ROM_HEADER_BUF_END-HW_ROM_HEADER_BUF );
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OS_BootFromFIRM();
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#endif
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}
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void TwlMain( void )
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{
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#ifdef PROFILE_ENABLE
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// 0: bootrom
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profile[pf_cnt++] = OS_TicksToMicroSecondsBROM32(OS_GetTick());
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#endif
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PreInit();
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#ifdef PROFILE_ENABLE
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// 1: before OS_InitFIRM
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profile[pf_cnt++] = OS_TicksToMicroSecondsBROM32(OS_GetTick());
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#endif
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OS_InitFIRM();
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OS_EnableIrq();
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OS_EnableInterrupts();
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#ifdef PROFILE_ENABLE
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// 2: before OS_InitTick
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profile[pf_cnt++] = OS_TicksToMicroSecondsBROM32(OS_GetTick());
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OS_InitTick();
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#endif
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PostInit();
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// 3: after PostInit
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PUSH_PROFILE();
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STD_CopyString((char*)HW_TWL_FS_BOOT_SRL_PATH_BUF, MENU_FILE);
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// 4: after STD_CopyString
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PUSH_PROFILE();
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PXI_NotifyID( FIRM_PXI_ID_SET_PATH );
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// 5: after PXI
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PUSH_PROFILE();
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if ( !FS_LoadHeader(&acPool, RSA_KEY_ADDR ) || !CheckHeader() )
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{
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OS_TPrintf("Failed to call FS_LoadHeader() and/or CheckHeader().\n");
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goto end;
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}
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// 6: after FS_LoadHeader
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PUSH_PROFILE();
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PXI_NotifyID( FIRM_PXI_ID_DONE_HEADER );
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// 7: after PXI
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PUSH_PROFILE();
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if ( !FS_LoadStatic() )
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{
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OS_TPrintf("Failed to call FS_LoadStatic().\n");
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goto end;
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}
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// 8: after FS_LoadStatic
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PUSH_PROFILE();
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PXI_NotifyID( FIRM_PXI_ID_DONE_STATIC );
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// 9: after PXI
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PUSH_PROFILE();
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#ifdef PROFILE_ENABLE
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{
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int i;
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OS_TPrintf("\n[ARM9] Begin\n");
|
||
for (i = 0; i < PROFILE_MAX; i++)
|
||
{
|
||
// OS_TPrintf("0x%08X\n", profile[i]);
|
||
if ( !profile[i] ) break;
|
||
OS_TPrintf("%2d: %7d usec", i, profile[i]);
|
||
if (i)
|
||
{
|
||
OS_TPrintf(" ( %7d usec )\n", profile[i]-profile[i-1]);
|
||
}
|
||
else
|
||
{
|
||
OS_TPrintf("\n");
|
||
}
|
||
}
|
||
OS_TPrintf("\n[ARM9] End\n");
|
||
PXI_NotifyID( FIRM_PXI_ID_NULL );
|
||
}
|
||
#endif
|
||
|
||
MI_CpuClearFast( OSi_GetFromFirmAddr(), sizeof(OSFromFirmBuf) );
|
||
OS_BootFromFIRM();
|
||
|
||
end:
|
||
EraseAll();
|
||
|
||
// failed
|
||
PXI_NotifyID( FIRM_PXI_ID_ERR );
|
||
PXI_NotifyID( FIRM_PXI_ID_ERR );
|
||
PXI_NotifyID( FIRM_PXI_ID_ERR );
|
||
PXI_NotifyID( FIRM_PXI_ID_ERR );
|
||
OS_Terminate();
|
||
}
|
||
|