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146 lines
5.5 KiB
C
146 lines
5.5 KiB
C
/*---------------------------------------------------------------------------*
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Project: TwlFirm - include - MI
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File: mainMemory.h
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Copyright 2007 Nintendo. All rights reserved.
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These coded instructions, statements, and computer programs contain
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proprietary information of Nintendo of America Inc. and/or Nintendo
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Company Ltd., and are protected by Federal copyright law. They may
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not be disclosed to third parties or copied or duplicated in any form,
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in whole or in part, without the prior written consent of Nintendo.
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$Date:: 2007-09-06$
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$Rev$
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$Author$
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*---------------------------------------------------------------------------*/
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#ifndef FIRM_MI_MAINMEMORY_H_
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#define FIRM_MI_MAINMEMORY_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef struct
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{
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u16 cr0;
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u16 cr1;
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u16 cr2;
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}
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MIMmemCR;
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//----------------------------------------------------------------------
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// メインメモリ CRコマンド
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//----------------------------------------------------------------------
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// for DS-PSRAM
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// CR0
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#define MMEM_DCR0_PARTIAL_REFRESH_NONE 0x0003 // パーシャルリフレッシュ無し
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#define MMEM_DCR0_BURST_CONTINUOUS 0x001c // 連続バースト（２２４バイト）
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#define MMEM_DCR0_BURST_MODE 0x0000 // バーストモード
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#define MMEM_DCR0_PAGE_MODE 0x0020 // ページモード
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#define MMEM_DCR0_SB1 0xffc0 // １固定
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// CR1
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#define MMEM_DCR1_1ST_R4_W3 0x0002 // １ｓｔＲ／Ｗ ＝ ４／３
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#define MMEM_DCR1_BURST_WRITE 0x0000 // バーストライト
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#define MMEM_DCR1_CLOCK_TRIGGER_UP 0x0100 // クロック立上り
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#define MMEM_DCR1_BURST_LINER 0x0200 // バーストリニア・シーケンス
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#define MMEM_DCR1_SB1 0xe430 // １固定
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// CR2
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#define MMEM_DCR2_SB1 0x004003fe // １固定
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#define MMEM_DCR2_CLOCK_TRIGGER_UP 0x00000400 // クロック立上り
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#define MMEM_DCR2_BURST_WRITE 0x00000000 // バーストライト
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#define MMEM_DCR2_BURST_LINER 0x00001000 // バーストリニア・シーケンス
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#define MMEM_DCR2_1ST_R4_W3 0x00004000 // １ｓｔＲ／Ｗ ＝ ４／３
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#define MMEM_DCR2_BURST_MODE 0x00000000 // バーストモード
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#define MMEM_DCR2_PAGE_MODE 0x00010000 // ページモード
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#define MMEM_DCR2_BURST_CONTINUOUS 0x000e0000 // 連続バースト（２２４バイト）
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#define MMEM_DCR2_PARTIAL_REFRESH_NONE 0x00300000 // パーシャルリフレッシュ無し
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// for TWL-PSRAM
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// CR0
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#define MMEM_TCR0_SET 0x0001 // セット
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#define MMEM_TCR0_VERIFY 0x0000 // ベリファイ
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#define MMEM_TCR0_SB1 0xfffe // １固定
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#define MMEM_TCR0 (MMEM_TCR0_SET | \
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MMEM_TCR0_SB1) // 0xFFFF
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#define MMEM_TCR0_R (MMEM_TCR0_VERIFY | \
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MMEM_TCR0_SB1) // 0xFFFE
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// CR1
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#define MMEM_TCR1_PARTIAL_REFRESH_8MB 0x0002 // パーシャルリフレッシュ先頭８ＭＢ
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#define MMEM_TCR1_PARTIAL_REFRESH_NONE 0x0003 // パーシャルリフレッシュなし（DSモード時）
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#define MMEM_TCR1_BURST_CONTINUOUS 0x001c // 連続バースト（２２４バイト）
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#define MMEM_TCR1_BURST_MODE 0x0000 // バーストモード
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#define MMEM_TCR1_DRV_SZ_CENTER 0x00c0 // ドライバーサイズ＝中心
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#define MMEM_TCR1_SB1 0xff00 // １固定
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#define MMEM_TCR1 (MMEM_TCR1_PARTIAL_REFRESH_8MB | \
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MMEM_TCR1_BURST_CONTINUOUS | \
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MMEM_TCR1_BURST_MODE | \
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MMEM_TCR1_DRV_SZ_CENTER | \
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MMEM_TCR1_SB1) // 0xFFDE
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#define MMEM_TCR1_DS (MMEM_TCR1 | MMEM_TCR1_PARTIAL_REFRESH_NONE) // 0xFFDF
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// CR2
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#define MMEM_TCR2_1ST_R4_W3 0x0002 // １ｓｔＲ／Ｗ ＝ ４／３
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#define MMEM_TCR2_REMAIN_PRV_MODE 0x0040 // 前モード保持
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#define MMEM_TCR2_WE_LEVEL 0x0080 // ＷＥレベルコントロール
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#define MMEM_TCR2_SB1 0xff28 // １固定
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#define MMEM_TCR2 (MMEM_TCR2_1ST_R4_W3 | \
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MMEM_TCR2_REMAIN_PRV_MODE | \
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MMEM_TCR2_WE_LEVEL | \
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MMEM_TCR2_SB1) // 0xFFEA
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/*---------------------------------------------------------------------------*
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Name: MIi_InitMainMemCR
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Description: change main memory into the burst mode
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Arguments: None
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Returns: None
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*---------------------------------------------------------------------------*/
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void MIi_InitMainMemCR( BOOL setCR );
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void MIi_GetMainMemCR( MIMmemCR* dest );
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/*---------------------------------------------------------------------------*
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Name: MIi_IsMainMemoryInitialized
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Description:
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Arguments: None
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Returns: None
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*---------------------------------------------------------------------------*/
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BOOL MIi_IsMainMemoryInitialized( void );
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/*---------------------------------------------------------------------------*
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Name: MIi_WaitMainMemoryInitialize
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Description:
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Arguments: None
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Returns: None
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*---------------------------------------------------------------------------*/
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void MIi_WaitMainMemoryInitialize( void );
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#ifdef __cplusplus
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} /* extern "C" */
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#endif
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/* FIRM_MI_MAINMEMORY_H_ */
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#endif
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