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git-svn-id: file:///Users/lillianskinner/Downloads/platinum/twl/TwlIPL/trunk@612 b08762b0-b915-fc4b-9d8c-17b2551a87ff
253 lines
9.4 KiB
C
253 lines
9.4 KiB
C
/*---------------------------------------------------------------------------*
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Project: TwlSDK - MI
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File: mi_dma.h
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Copyright 2003 Nintendo. All rights reserved.
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These coded instructions, statements, and computer programs contain
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proprietary information of Nintendo of America Inc. and/or Nintendo
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Company Ltd., and are protected by Federal copyright law. They may
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not be disclosed to third parties or copied or duplicated in any form,
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in whole or in part, without the prior written consent of Nintendo.
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$Date:: $
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$Rev$
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$Author$
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*---------------------------------------------------------------------------*/
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#ifndef NITRO_COMMON_MI_DMA_H_
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#define NITRO_COMMON_MI_DMA_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <nitro.h>
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//================================================================================
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// DMA system work
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//================================================================================
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#ifdef SDK_ARM9
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# ifdef SDK_TS
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# define MIi_DMA_CLEAR_DATA_BUF REG_DMA0_CLR_DATA_ADDR // ARM9-TS: defined ARM9/ioreg_MI.h
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# else
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# define MIi_DMA_CLEAR_DATA_BUF HW_DMA_CLEAR_DATA_BUF // ARM9-TEG: defined common/mmap_shared.h
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# endif
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#else // ifdef SDK_ARM9
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# define MIi_DMA_CLEAR_DATA_BUF HW_PRV_WRAM_DMA_CLEAR_DATA_BUF // ARM7: defined ARM7/mmap_wram.h
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#endif // ifdef SDK_ARM9
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typedef union
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{
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u32 b32;
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u16 b16;
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}
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MIiDmaClearSrc;
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//================================================================================
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// setting DMA
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//================================================================================
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//---------------- set parameters
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#ifdef SDK_ARM9
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void MIi_DmaSetParams(u32 dmaNo, u32 src, u32 dest, u32 ctrl);
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void MIi_DmaSetParams_wait(u32 dmaNo, u32 src, u32 dest, u32 ctrl);
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void MIi_DmaSetParams_noInt(u32 dmaNo, u32 src, u32 dest, u32 ctrl);
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void MIi_DmaSetParams_wait_noInt(u32 dmaNo, u32 src, u32 dest, u32 ctrl);
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#else // ifdef SDK_ARM9
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static inline void MIi_DmaSetParams(u32 dmaNo, u32 src, u32 dest, u32 ctrl)
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{
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OSIntrMode enabled = OS_DisableInterrupts();
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vu32 *p = (vu32 *)((u32)REG_DMA0SAD_ADDR + dmaNo * 12);
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*p = (vu32)src;
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*(p + 1) = (vu32)dest;
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*(p + 2) = (vu32)ctrl;
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(void)OS_RestoreInterrupts(enabled);
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}
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static inline void MIi_DmaSetParams_wait(u32 dmaNo, u32 src, u32 dest, u32 ctrl)
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{
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OSIntrMode enabled = OS_DisableInterrupts();
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vu32 *p = (vu32 *)((u32)REG_DMA0SAD_ADDR + dmaNo * 12);
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*p = (vu32)src;
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*(p + 1) = (vu32)dest;
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*(p + 2) = (vu32)ctrl;
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// ARM7 must wait 2 cycle (load is 3 cycle)
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{
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u32 dummy = reg_MI_DMA0SAD;
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}
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(void)OS_RestoreInterrupts(enabled);
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}
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static inline void MIi_DmaSetParams_noInt(u32 dmaNo, u32 src, u32 dest, u32 ctrl)
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{
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vu32 *p = (vu32 *)((u32)REG_DMA0SAD_ADDR + dmaNo * 12);
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*p = (vu32)src;
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*(p + 1) = (vu32)dest;
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*(p + 2) = (vu32)ctrl;
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}
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static inline void MIi_DmaSetParams_wait_noInt(u32 dmaNo, u32 src, u32 dest, u32 ctrl)
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{
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vu32 *p = (vu32 *)((u32)REG_DMA0SAD_ADDR + dmaNo * 12);
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*p = (vu32)src;
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*(p + 1) = (vu32)dest;
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*(p + 2) = (vu32)ctrl;
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// ARM7 must wait 2 cycle (load is 3 cycle)
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{
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u32 dummy = reg_MI_DMA0SAD;
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}
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}
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#endif
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static inline void MIi_DmaSetParams_src32(u32 dmaNo, u32 data, u32 dest, u32 ctrl)
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{
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OSIntrMode enabled = OS_DisableInterrupts();
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MIiDmaClearSrc *srcp = (MIiDmaClearSrc *) ((u32)MIi_DMA_CLEAR_DATA_BUF + dmaNo * 4);
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srcp->b32 = data;
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MIi_DmaSetParams_noInt(dmaNo, (u32)srcp, dest, ctrl);
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(void)OS_RestoreInterrupts(enabled);
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}
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static inline void MIi_DmaSetParams_src16(u32 dmaNo, u16 data, u32 dest, u32 ctrl)
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{
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OSIntrMode enabled = OS_DisableInterrupts();
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MIiDmaClearSrc *srcp = (MIiDmaClearSrc *) ((u32)MIi_DMA_CLEAR_DATA_BUF + dmaNo * 4);
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srcp->b16 = data;
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MIi_DmaSetParams_noInt(dmaNo, (u32)srcp, dest, ctrl);
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(void)OS_RestoreInterrupts(enabled);
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}
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static inline void MIi_DmaSetParams_wait_src32(u32 dmaNo, u32 data, u32 dest, u32 ctrl)
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{
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OSIntrMode enabled = OS_DisableInterrupts();
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MIiDmaClearSrc *srcp = (MIiDmaClearSrc *) ((u32)MIi_DMA_CLEAR_DATA_BUF + dmaNo * 4);
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srcp->b32 = data;
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MIi_DmaSetParams_wait_noInt(dmaNo, (u32)srcp, dest, ctrl);
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(void)OS_RestoreInterrupts(enabled);
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}
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static inline void MIi_DmaSetParams_wait_src16(u32 dmaNo, u16 data, u32 dest, u32 ctrl)
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{
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OSIntrMode enabled = OS_DisableInterrupts();
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MIiDmaClearSrc *srcp = (MIiDmaClearSrc *) ((u32)MIi_DMA_CLEAR_DATA_BUF + dmaNo * 4);
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srcp->b16 = data;
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MIi_DmaSetParams_wait_noInt(dmaNo, (u32)srcp, dest, ctrl);
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(void)OS_RestoreInterrupts(enabled);
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}
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//================================================================================
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// CALLBACK
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//================================================================================
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extern void OSi_EnterDmaCallback(u32 dmaNo, MIDmaCallback callback, void *arg);
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static inline void MIi_CallCallback(MIDmaCallback callback, void *arg)
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{
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if (callback)
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{
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(callback) (arg);
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}
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}
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//================================================================================
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// WAIT
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//================================================================================
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//----------------------------------------------------------------
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// for waiting DMA busy
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#define MIi_Wait_BeforeDMA( dmaCntp, dmaNo ) \
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do { \
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dmaCntp = &((vu32*)REG_DMA0SAD_ADDR)[dmaNo * 3 + 2]; \
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MIi_ASSERT_DMANO( dmaNo ); \
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while ( *dmaCntp & REG_MI_DMA0CNT_E_MASK ) {} \
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}while(0)
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#define MIi_Wait_AfterDMA( dmaCntp ) \
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do { \
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while ( *dmaCntp & REG_MI_DMA0CNT_E_MASK ) {} \
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}while(0)
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//================================================================================
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// ASSERT
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//================================================================================
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#define MIi_ASSERT_DMANO( dmaNo ) SDK_ASSERTMSG( (dmaNo) <= MI_DMA_MAX_NUM, "illegal DMA No." )
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#define MIi_ASSERT_MUL2( size ) SDK_ASSERTMSG( ((size) & 1) == 0, "size & 1 must be 0" )
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#define MIi_ASSERT_MUL4( size ) SDK_ASSERTMSG( ((size) & 3) == 0, "size & 3 must be 0" )
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#define MIi_ASSERT_SRC_ALIGN512( src ) SDK_ASSERTMSG( ((u32)(src) & 511) == 0, "source address must be in 512-byte alignment" )
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#define MIi_ASSERT_SRC_ALIGN4( src ) SDK_ASSERTMSG( ((u32)(src) & 3) == 0, "source address must be in 4-byte alignment" )
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#define MIi_ASSERT_SRC_ALIGN2( src ) SDK_ASSERTMSG( ((u32)(src) & 1) == 0, "source address must be in 2-byte alignment" )
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#define MIi_ASSERT_DEST_ALIGN4( dest ) SDK_ASSERTMSG( ((u32)(dest) & 3) == 0, "destination address must be in 4-byte alignment" )
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#define MIi_ASSERT_DEST_ALIGN2( dest ) SDK_ASSERTMSG( ((u32)(dest) & 1) == 0, "destination address must be in 2-byte alignment" )
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#ifdef SDK_ARM9
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# define MIi_ASSERT_SIZE( dmaNo, size ) SDK_ASSERTMSG( (size) <= 0x1fffff, "size too large" );
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#else //SDK_ARM7
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# define MIi_ASSERT_SIZE( dmaNo, size ) \
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do{ \
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if ( dmaNo <= 2 ) \
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{ \
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SDK_ASSERTMSG( (size) <= 0x3fff, "size too large" );\
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} \
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else \
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{ \
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SDK_ASSERTMSG( (size) <= 0xffff, "size too large" );\
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} \
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} while(0)
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#endif
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//================================================================================
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// CHECK
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//================================================================================
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//----------------------------------------------------------------
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// Check if specified area is in ITCM/DTCM.
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//
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#if defined( SDK_ARM9 ) && defined( SDK_DEBUG )
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void MIi_CheckAddressInTCM(u32 addr, u32 size);
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#define MIi_WARNING_ADDRINTCM( addr, size ) MIi_CheckAddressInTCM( (u32)addr, (u32)size )
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#else
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#define MIi_WARNING_ADDRINTCM( addr, size ) ((void)0)
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#endif
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//----------------------------------------------------------------
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// for DMA check
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// (must avoid multiple auto start DMA)
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//
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#ifdef SDK_ARM9
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void MIi_CheckAnotherAutoDMA(u32 dmaNo, u32 dmaType);
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#endif
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//----------------------------------------------------------------
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// for DMA0 check
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// Source address which is in I/O register or cartridge bus
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// is not available.
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void MIi_CheckDma0SourceAddress(u32 dmaNo, u32 src, u32 size, u32 dir);
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//================================================================================
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// dummy DMA for multi DMA problem
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//================================================================================
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#define MIi_DUMMY_DMA_NO 0
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#define MIi_DUMMY_SRC 0
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#define MIi_DUMMY_DEST 0
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#define MIi_DUMMY_CNT ( MI_DMA_ENABLE | MI_DMA_SRC_FIX | MI_DMA_DEST_FIX | MI_DMA_16BIT_BUS | 1 )
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#ifdef __cplusplus
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} /* extern "C" */
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#endif
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/* MI_COMMON_MI_DMA_H_ */
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#endif
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