diff --git a/build/components/hyena.TWL/Makefile b/build/components/hyena.TWL/Makefile
index 4a16681a..9bcf9975 100644
--- a/build/components/hyena.TWL/Makefile
+++ b/build/components/hyena.TWL/Makefile
@@ -52,7 +52,7 @@ endif
 
 #MACRO_FLAGS		+=	-DSDK_ARM7COMP_LTD
 
-MAKELCF_FLAGS	+=	-DADDRESS_LTDWRAM='0x037b8000' \
+MAKELCF_FLAGS	+=	-DADDRESS_LTDWRAM='0x037a8000' \
 					-DADDRESS_FLXMAIN='0x02280000' \
 					-DADDRESS_BOOTCORE='0x0380f000' \
 					-DCRT0_O='$(CRT0_O)'
diff --git a/build/components/hyena.TWL/hyena.lcf.template b/build/components/hyena.TWL/hyena.lcf.template
index 010e70bd..24a0792c 100644
--- a/build/components/hyena.TWL/hyena.lcf.template
+++ b/build/components/hyena.TWL/hyena.lcf.template
@@ -30,7 +30,7 @@ MEMORY
 	<OVERLAY.NAME>				(RWXO):	ORIGIN = <OVERLAY.ADDRESS>,		LENGTH = 0x0	>	<OVERLAY.NAME><PROPERTY.FLXSUFFIX>
 	<END.OVERLAYS>
 
-	check.WORKRAM				(RWX) :	ORIGIN = 0x037b8000,			LENGTH = 0x58000	>	workram.check
+	check.WORKRAM				(RWX) :	ORIGIN = 0x037a8000,			LENGTH = 0x58000	>	workram.check
 
 	binary.LTDAUTOLOAD_TOP		(RW)  :	ORIGIN = 0,						LENGTH = 0x0	>	<STATIC.NAME><PROPERTY.LTDSUFFIX>
 	<FOREACH.LTDAUTOLOADS>
diff --git a/build/components/hyena.TWL/wram_regs/wram_regs.c b/build/components/hyena.TWL/wram_regs/wram_regs.c
index 0d93fa87..8509d65a 100644
--- a/build/components/hyena.TWL/wram_regs/wram_regs.c
+++ b/build/components/hyena.TWL/wram_regs/wram_regs.c
@@ -56,12 +56,21 @@ u32 HYENA_WramReg[0x30/sizeof(u32)] =
         TRUE, MI_WRAM_OFFSET_32KB,  MI_WRAM_ARM9,
         TRUE, MI_WRAM_OFFSET_0KB,   MI_WRAM_ARM9
     ),
+#if 0
     REG_MI_MBK3_FIELD(
         TRUE, MI_WRAM_OFFSET_224KB, MI_WRAM_ARM7,
         TRUE, MI_WRAM_OFFSET_192KB, MI_WRAM_ARM9,
         TRUE, MI_WRAM_OFFSET_160KB, MI_WRAM_ARM9,
         TRUE, MI_WRAM_OFFSET_128KB, MI_WRAM_ARM9
     ),
+#else
+    REG_MI_MBK3_FIELD(
+        TRUE, MI_WRAM_OFFSET_224KB, MI_WRAM_ARM7,
+        TRUE, MI_WRAM_OFFSET_192KB, MI_WRAM_ARM7,
+        TRUE, MI_WRAM_OFFSET_160KB, MI_WRAM_ARM7,
+        TRUE, MI_WRAM_OFFSET_128KB, MI_WRAM_ARM7
+    ),
+#endif
     // WRAM-C
     REG_MI_MBK4_FIELD(
         TRUE, MI_WRAM_OFFSET_96KB,  MI_WRAM_ARM9,
diff --git a/docs/メモリマップ_ランチャー.vsd b/docs/メモリマップ_ランチャー.vsd
index 5ca94bc9..2f7ff71d 100644
Binary files a/docs/メモリマップ_ランチャー.vsd and b/docs/メモリマップ_ランチャー.vsd differ