From 93c4285ef25664ab1913778f580089f81bf741f2 Mon Sep 17 00:00:00 2001 From: nakasima Date: Mon, 30 Jun 2008 06:16:29 +0000 Subject: [PATCH] =?UTF-8?q?hyena=E3=81=AEWRAM=E3=83=90=E3=83=B3=E3=82=AF?= =?UTF-8?q?=E3=82=92Makefile=E3=81=AE=E5=A4=89=E6=9B=B4=E3=81=AB=E5=90=88?= =?UTF-8?q?=E3=82=8F=E3=81=9B=E3=81=A6=E4=BF=AE=E6=AD=A3=E3=80=82?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit git-svn-id: file:///Users/lillianskinner/Downloads/platinum/twl/TwlIPL/trunk@1744 b08762b0-b915-fc4b-9d8c-17b2551a87ff --- build/components/hyena.TWL/wram_regs/wram_regs.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/build/components/hyena.TWL/wram_regs/wram_regs.c b/build/components/hyena.TWL/wram_regs/wram_regs.c index e5ee1268..37d2bf51 100644 --- a/build/components/hyena.TWL/wram_regs/wram_regs.c +++ b/build/components/hyena.TWL/wram_regs/wram_regs.c @@ -62,7 +62,7 @@ u32 HYENA_WramReg[0x30/sizeof(u32)] = TRUE, MI_WRAM_OFFSET_224KB, MI_WRAM_ARM7, TRUE, MI_WRAM_OFFSET_192KB, MI_WRAM_ARM7, TRUE, MI_WRAM_OFFSET_160KB, MI_WRAM_ARM7, - TRUE, MI_WRAM_OFFSET_128KB, MI_WRAM_ARM9 + TRUE, MI_WRAM_OFFSET_128KB, MI_WRAM_ARM7 ), // WRAM-C REG_MI_MBK4_FIELD(