From 929327128ab9b55abde836989a376ce5cb9d3425 Mon Sep 17 00:00:00 2001 From: yutaka Date: Tue, 25 Sep 2007 04:39:13 +0000 Subject: [PATCH] =?UTF-8?q?=E6=B1=9A=E3=81=84=E3=81=91=E3=81=A9=E3=80=81?= =?UTF-8?q?=E5=8B=95=E3=81=84=E3=81=9F=E3=81=AE=E3=81=A7=E4=BF=9D=E5=AD=98?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit git-svn-id: file:///Users/lillianskinner/Downloads/platinum/twl/TwlIPL/trunk@27 b08762b0-b915-fc4b-9d8c-17b2551a87ff --- build/libraries/fatfs/ARM7/src/fatfs_firm.c | 6 ++- build/libraries/init/ARM7/crt0_firm.c | 5 ++ build/libraries/mi/ARM9/mi_init_mainMemory.c | 6 +-- build/libraries/os/common/os_boot.c | 20 +++++-- build/libraries/os/common/os_init_firm.c | 21 ++++++-- build/nandfirm/nandfirm-loader/ARM7/main.c | 16 +++--- .../nandfirm/nandfirm-loader/nandfirm.nandsf | 2 +- .../nandfirm-loader/wram_regs/wram_regs.c | 52 +++++++++---------- .../firm/specfiles/ARM9-TS-FIRM.lcf.template | 2 +- 9 files changed, 83 insertions(+), 47 deletions(-) diff --git a/build/libraries/fatfs/ARM7/src/fatfs_firm.c b/build/libraries/fatfs/ARM7/src/fatfs_firm.c index 708ab622..2f5fe94f 100644 --- a/build/libraries/fatfs/ARM7/src/fatfs_firm.c +++ b/build/libraries/fatfs/ARM7/src/fatfs_firm.c @@ -24,7 +24,11 @@ #include #include -#include +//#include + +#define OS_InitDebugLED() (TRUE) +#define OS_SetDebugLED(pattern) (TRUE) +#define OS_GetDebugLED() (TRUE) extern u32 NAND_FAT_PARTITION_COUNT; diff --git a/build/libraries/init/ARM7/crt0_firm.c b/build/libraries/init/ARM7/crt0_firm.c index 156a1b81..e2d03a55 100644 --- a/build/libraries/init/ARM7/crt0_firm.c +++ b/build/libraries/init/ARM7/crt0_firm.c @@ -54,6 +54,11 @@ extern void SDK_AUTOLOAD_LIST_END(void); // end pointer to autoload infor *---------------------------------------------------------------------------*/ SDK_WEAK_SYMBOL asm void _start( void ) { + ldr r1, =REG_JTAG_ADDR + ldrh r2, [r1] + orr r2, r2, #REG_SCFG_JTAG_CPUJE_MASK | REG_SCFG_JTAG_ARM7SEL_MASK + strh r2, [r1] + //---- set IME = 0 // ( use that LSB of HW_REG_BASE equal to 0 ) mov r12, #HW_REG_BASE diff --git a/build/libraries/mi/ARM9/mi_init_mainMemory.c b/build/libraries/mi/ARM9/mi_init_mainMemory.c index 18af56ee..8cbe30f0 100644 --- a/build/libraries/mi/ARM9/mi_init_mainMemory.c +++ b/build/libraries/mi/ARM9/mi_init_mainMemory.c @@ -78,7 +78,7 @@ asm void MIi_InitMainMemCR( void ) bl OS_SpinWait ldr r3, =HW_WRAM_AREA - 2 -#if PLATFORM == BB +#ifdef SDK_BB ldr r0, =MMEM_DCR0_BURST_MODE | MMEM_DCR0_BURST_CONTINUOUS \ | MMEM_DCR0_PARTIAL_REFRESH_NONE | MMEM_DCR0_SB1 ldr r1, =MMEM_DCR1_1ST_R4_W3 | MMEM_DCR1_BURST_WRITE | MMEM_DCR1_BURST_LINER \ @@ -93,7 +93,7 @@ asm void MIi_InitMainMemCR( void ) strh r0, [r3] strh r1, [r3] ldrh lr, [r2] -#else // PLATFORM == TS +#else // SDK_BB ldr r0, =MMEM_TCR0 ldr r1, =MMEM_TCR1 ldr r2, =MMEM_TCR2 @@ -103,7 +103,7 @@ asm void MIi_InitMainMemCR( void ) strh r0, [r3] strh r1, [r3] strh r2, [r3] -#endif // PLATFORM == TS +#endif // SDK_BB ldr r3, =REG_EXMEMCNT_ADDR mov r1, #REG_MI_EXMEMCNT_IFM_MASK | REG_MI_EXMEMCNT_CE2_MASK diff --git a/build/libraries/os/common/os_boot.c b/build/libraries/os/common/os_boot.c index 7a3214e3..73c3378f 100644 --- a/build/libraries/os/common/os_boot.c +++ b/build/libraries/os/common/os_boot.c @@ -25,6 +25,9 @@ void OSi_BootCore( OSEntryPoint p, MIHeader_WramRegs* w ); +#ifdef SDK_ARM7 +#include +#endif /*---------------------------------------------------------------------------* Name: OSi_Boot @@ -51,6 +54,9 @@ void OSi_Boot( void* entry, MIHeader_WramRegs* w ) #endif // SDK_ARM7 MI_CpuCopyFast( OSi_BootCore, OSBootCore, 0x200 ); +#ifdef SDK_ARM7 + I2Ci_WriteRegister(I2C_SLAVE_DEBUG_LED, 0x01, (0xff)); +#endif OSBootCore(p, w); } @@ -128,6 +134,7 @@ asm void OSi_BootCore( OSEntryPoint p, MIHeader_WramRegs* w ) mov r10, r1 #ifdef SDK_ARM9 +#if 1 // wait for request of wram map ldr r3, =REG_SUBPINTF_ADDR mov r2, #REG_PXI_SUBPINTF_A7STATUS_MASK @@ -136,7 +143,7 @@ asm void OSi_BootCore( OSEntryPoint p, MIHeader_WramRegs* w ) and r0, r0, r2 cmp r0, r2 bne @0 - +#endif // r10- => r9-r2 ldr r9, =REG_MBK1_ADDR add r2, r9, #32 @@ -145,7 +152,7 @@ asm void OSi_BootCore( OSEntryPoint p, MIHeader_WramRegs* w ) str r3, [r9], #4 cmp r9, r2 blt @1 - +#if 1 // notify wram map ldr r3, =REG_SUBPINTF_ADDR mov r0, #REG_PXI_SUBPINTF_A9STATUS_MASK @@ -160,7 +167,9 @@ asm void OSi_BootCore( OSEntryPoint p, MIHeader_WramRegs* w ) // finalize pxi mov r0, #0 str r0, [r3] +#endif #else +#if 1 // request wram map ldr r3, =REG_MAINPINTF_ADDR mov r0, #REG_PXI_MAINPINTF_A7STATUS_MASK @@ -175,11 +184,12 @@ asm void OSi_BootCore( OSEntryPoint p, MIHeader_WramRegs* w ) // finalize pxi mov r0, #0 str r0, [r3] +#endif // r10- => r9-r2 add r10, r10, #32 ldr r9, =REG_MBK6_ADDR - add r2, r9, #13 + add r2, r9, #15 @1: ldr r3, [r10], #4 str r3, [r9], #4 @@ -189,7 +199,7 @@ asm void OSi_BootCore( OSEntryPoint p, MIHeader_WramRegs* w ) // clear stack with r4-r9 mov r0, #0 -#if 0 +#if 1 ldr r1, =HW_FIRM_STACK ldr r2, =HW_FIRM_STACK_SIZE bl MIi_CpuClearFast @@ -198,7 +208,7 @@ asm void OSi_BootCore( OSEntryPoint p, MIHeader_WramRegs* w ) mov lr, r11 // clear registers -#if 0 +#if 1 ldr sp, =HW_FIRM_STACK ldmia sp, {r0-r12,sp} #endif diff --git a/build/libraries/os/common/os_init_firm.c b/build/libraries/os/common/os_init_firm.c index 937ba30e..6c1886a6 100644 --- a/build/libraries/os/common/os_init_firm.c +++ b/build/libraries/os/common/os_init_firm.c @@ -15,7 +15,9 @@ $Author$ *---------------------------------------------------------------------------*/ #include - +#ifdef SDK_ARM7 +#include +#endif /*---------------------------------------------------------------------------* Name: OS_InitNOR @@ -37,7 +39,7 @@ void OS_InitFIRM(void) #ifdef SDK_ENABLE_ARM7_PRINT // Init PrintServer for ARM7 (if specified) - OS_InitPrintServer(); +// OS_InitPrintServer(); #endif //---- Init interProcessor I/F @@ -50,7 +52,7 @@ void OS_InitFIRM(void) OS_InitArena(); //---- Init Spinlock - OS_InitLock(); +// OS_InitLock(); //---- Init Arena (extended main) OS_InitArenaEx(); @@ -104,33 +106,44 @@ void OS_InitFIRM(void) //---------------------------------------------------------------- // for ARM7 + I2Ci_WriteRegister(I2C_SLAVE_DEBUG_LED, 0x03, 0x00); + I2Ci_WriteRegister(I2C_SLAVE_DEBUG_LED, 0x01, (0xff)); + //---- Init interProcessor I/F //PXI_Init(); PXI_InitFifoFIRM(); + I2Ci_WriteRegister(I2C_SLAVE_DEBUG_LED, 0x01, (0xf0)); //---- Init Arena (SUBPRIV-WRAM arena) OS_InitArena(); + I2Ci_WriteRegister(I2C_SLAVE_DEBUG_LED, 0x01, (0x3)); //---- Init Spinlock - OS_InitLock(); +// OS_InitLock(); + I2Ci_WriteRegister(I2C_SLAVE_DEBUG_LED, 0x01, (0x2)); //---- Init IRQ Table OS_InitIrqTable(); + I2Ci_WriteRegister(I2C_SLAVE_DEBUG_LED, 0x01, (0x1)); #define SDK_EXCEPTION_BUG #ifndef SDK_EXCEPTION_BUG //---- Init Exception System OS_InitException(); #endif + I2Ci_WriteRegister(I2C_SLAVE_DEBUG_LED, 0x01, (0x0)); //---- Init Tick OS_InitTick(); + I2Ci_WriteRegister(I2C_SLAVE_DEBUG_LED, 0x01, (0x10)); //---- Init Alarm System OS_InitAlarm(); + I2Ci_WriteRegister(I2C_SLAVE_DEBUG_LED, 0x01, (0x20)); //---- Init Thread System OS_InitThread(); + I2Ci_WriteRegister(I2C_SLAVE_DEBUG_LED, 0x01, (0x30)); //---- Init Reset System #ifndef SDK_SMALL_BUILD diff --git a/build/nandfirm/nandfirm-loader/ARM7/main.c b/build/nandfirm/nandfirm-loader/ARM7/main.c index a8de90a1..33c0c6c3 100644 --- a/build/nandfirm/nandfirm-loader/ARM7/main.c +++ b/build/nandfirm/nandfirm-loader/ARM7/main.c @@ -20,7 +20,7 @@ #include //#define BOOT_SECURE_SRL // 本番SRLをブートするときにだけ定義する -#define FIRM_ENABLE_JTAG +//#define FIRM_ENABLE_JTAG #define FATFS_HEAP_SIZE (64*1024) @@ -28,10 +28,10 @@ #define BOOT_DEVICE FATFS_MEDIA_TYPE_SD #define PARTITION_NO 0 // 0固定 #define MENU_FILE (char*)L"A:\\menu.srl" // 対象ファイル(DRIVE_LETTERと合わせること) -#define MENU_FILE_A "A:\\menu_a.srl" // 対象ファイル(DRIVE_LETTERと合わせること) -#define MENU_FILE_B "A:\\menu_b.srl" // 対象ファイル(DRIVE_LETTERと合わせること) -#define MENU_FILE_L "A:\\menu_l.srl" // 対象ファイル(DRIVE_LETTERと合わせること) -#define MENU_FILE_R "A:\\menu_r.srl" // 対象ファイル(DRIVE_LETTERと合わせること) +#define MENU_FILE_A (char*)L"A:\\menu_a.srl" // 対象ファイル(DRIVE_LETTERと合わせること) +#define MENU_FILE_B (char*)L"A:\\menu_b.srl" // 対象ファイル(DRIVE_LETTERと合わせること) +#define MENU_FILE_L (char*)L"A:\\menu_l.srl" // 対象ファイル(DRIVE_LETTERと合わせること) +#define MENU_FILE_R (char*)L"A:\\menu_r.srl" // 対象ファイル(DRIVE_LETTERと合わせること) #else #define BOOT_DEVICE FATFS_MEDIA_TYPE_NAND #define PARTITION_NO 0 // 対象パーティション @@ -43,7 +43,7 @@ static u64 fatfs_arena[FATFS_HEAP_SIZE/sizeof(u64)]; #ifndef SDK_FINALROM -static u8 step = 0; +static u8 step = 0x80; #endif void TwlSpMain( void ) @@ -54,6 +54,10 @@ void TwlSpMain( void ) MIi_CpuClearFast( 0, (void*)OSi_GetFromBromAddr(), sizeof(OSFromBromBuf) ); #endif +// I2Ci_WriteRegister(I2C_SLAVE_DEBUG_LED, 0x03, 0x00); +// I2Ci_WriteRegister(I2C_SLAVE_DEBUG_LED, 0x01, (0xff)); + + #ifdef FIRM_ENABLE_JTAG reg_SCFG_JTAG = REG_SCFG_JTAG_CPUJE_MASK | REG_SCFG_JTAG_ARM7SEL_MASK; #endif // FIRM_ENABLE_JTAG diff --git a/build/nandfirm/nandfirm-loader/nandfirm.nandsf b/build/nandfirm/nandfirm-loader/nandfirm.nandsf index 0e6773af..35a9c20f 100644 --- a/build/nandfirm/nandfirm-loader/nandfirm.nandsf +++ b/build/nandfirm/nandfirm-loader/nandfirm.nandsf @@ -19,6 +19,6 @@ ARM7_COMP : FALSE # TRUE or FALSE, should be before ARM7_SBIN ARM7_SBIN : $(MAKEFIRM_ARM7).sbin ARM7_ELF : $(MAKEFIRM_ARM7).axf -ARM9_X2 : TRUE # TRUE or FALSE +ARM9_X2 : FALSE # TRUE or FALSE NCD_ROMOFS : 0x07fe00 diff --git a/build/nandfirm/nandfirm-loader/wram_regs/wram_regs.c b/build/nandfirm/nandfirm-loader/wram_regs/wram_regs.c index e537ee61..bafe67b4 100644 --- a/build/nandfirm/nandfirm-loader/wram_regs/wram_regs.c +++ b/build/nandfirm/nandfirm-loader/wram_regs/wram_regs.c @@ -21,10 +21,10 @@ MIHeader_WramRegs wram_regs_init = { // ARM9 { - REG_MI_MBK_A0_FIELD( 1, MI_WRAM_A_OFFSET_0KB , MI_WRAM_ARM7 ), - REG_MI_MBK_A1_FIELD( 1, MI_WRAM_A_OFFSET_64KB , MI_WRAM_ARM7 ), - REG_MI_MBK_A2_FIELD( 1, MI_WRAM_A_OFFSET_128KB, MI_WRAM_ARM7 ), - REG_MI_MBK_A3_FIELD( 1, MI_WRAM_A_OFFSET_192KB, MI_WRAM_ARM7 ), + REG_MI_MBK_A0_FIELD( 1, MI_WRAM_A_OFFSET_0KB , MI_WRAM_ARM9 ), + REG_MI_MBK_A1_FIELD( 1, MI_WRAM_A_OFFSET_64KB , MI_WRAM_ARM9 ), + REG_MI_MBK_A2_FIELD( 1, MI_WRAM_A_OFFSET_128KB, MI_WRAM_ARM9 ), + REG_MI_MBK_A3_FIELD( 1, MI_WRAM_A_OFFSET_192KB, MI_WRAM_ARM9 ), }, { REG_MI_MBK_B0_FIELD( 1, MI_WRAM_BC_OFFSET_0KB , MI_WRAM_ARM7 ), @@ -37,29 +37,15 @@ MIHeader_WramRegs wram_regs_init = REG_MI_MBK_B7_FIELD( 1, MI_WRAM_BC_OFFSET_224KB, MI_WRAM_ARM7 ), }, { - REG_MI_MBK_C0_FIELD( 1, MI_WRAM_BC_OFFSET_0KB , MI_WRAM_ARM9 ), - REG_MI_MBK_C1_FIELD( 1, MI_WRAM_BC_OFFSET_32KB , MI_WRAM_ARM9 ), - REG_MI_MBK_C2_FIELD( 1, MI_WRAM_BC_OFFSET_64KB , MI_WRAM_ARM9 ), - REG_MI_MBK_C3_FIELD( 1, MI_WRAM_BC_OFFSET_96KB , MI_WRAM_ARM9 ), - REG_MI_MBK_C4_FIELD( 1, MI_WRAM_BC_OFFSET_128KB, MI_WRAM_ARM9 ), - REG_MI_MBK_C5_FIELD( 1, MI_WRAM_BC_OFFSET_160KB, MI_WRAM_ARM9 ), - REG_MI_MBK_C6_FIELD( 1, MI_WRAM_BC_OFFSET_192KB, MI_WRAM_ARM9 ), - REG_MI_MBK_C7_FIELD( 1, MI_WRAM_BC_OFFSET_224KB, MI_WRAM_ARM9 ), + REG_MI_MBK_C0_FIELD( 1, MI_WRAM_BC_OFFSET_0KB , MI_WRAM_ARM7 ), + REG_MI_MBK_C1_FIELD( 1, MI_WRAM_BC_OFFSET_32KB , MI_WRAM_ARM7 ), + REG_MI_MBK_C2_FIELD( 1, MI_WRAM_BC_OFFSET_64KB , MI_WRAM_ARM7 ), + REG_MI_MBK_C3_FIELD( 1, MI_WRAM_BC_OFFSET_96KB , MI_WRAM_ARM7 ), + REG_MI_MBK_C4_FIELD( 1, MI_WRAM_BC_OFFSET_128KB, MI_WRAM_ARM7 ), + REG_MI_MBK_C5_FIELD( 1, MI_WRAM_BC_OFFSET_160KB, MI_WRAM_ARM7 ), + REG_MI_MBK_C6_FIELD( 1, MI_WRAM_BC_OFFSET_192KB, MI_WRAM_ARM7 ), + REG_MI_MBK_C7_FIELD( 1, MI_WRAM_BC_OFFSET_224KB, MI_WRAM_ARM7 ), }, - REG_MI_MBK6_FIELD( REG_WRAM_MAP_CONV_ADDR( 6, A, EADDR, MI_WRAM_MAP_NULL ), - MI_WRAM_IMAGE_256KB, - REG_WRAM_MAP_CONV_ADDR( 6, A, SADDR, MI_WRAM_MAP_NULL ) - ), - REG_MI_MBK7_FIELD( REG_WRAM_MAP_CONV_ADDR( 7, B, EADDR, HW_WRAM_AREA_HALF + 0x00080000 ), - MI_WRAM_IMAGE_256KB, - REG_WRAM_MAP_CONV_ADDR( 7, B, SADDR, HW_WRAM_AREA_HALF + 0x00040000 ) - ), - REG_MI_MBK8_FIELD( REG_WRAM_MAP_CONV_ADDR( 8, C, EADDR, HW_WRAM_AREA_HALF + 0x00040000 ), - MI_WRAM_IMAGE_256KB, - REG_WRAM_MAP_CONV_ADDR( 8, C, SADDR, HW_WRAM_AREA_HALF ) - ), - - // ARM7 REG_MI_MBK6_FIELD( REG_WRAM_MAP_CONV_ADDR( 6, A, EADDR, HW_WRAM_AREA_HALF + 0x00040000 ), MI_WRAM_IMAGE_256KB, REG_WRAM_MAP_CONV_ADDR( 6, A, SADDR, HW_WRAM_AREA_HALF ) @@ -73,6 +59,20 @@ MIHeader_WramRegs wram_regs_init = REG_WRAM_MAP_CONV_ADDR( 8, C, SADDR, MI_WRAM_MAP_NULL ) ), + // ARM7 + REG_MI_MBK6_FIELD( REG_WRAM_MAP_CONV_ADDR( 6, A, EADDR, MI_WRAM_MAP_NULL ), + MI_WRAM_IMAGE_256KB, + REG_WRAM_MAP_CONV_ADDR( 6, A, SADDR, MI_WRAM_MAP_NULL ) + ), + REG_MI_MBK7_FIELD( REG_WRAM_MAP_CONV_ADDR( 7, B, EADDR, HW_WRAM_AREA_HALF + 0x00080000 ), + MI_WRAM_IMAGE_256KB, + REG_WRAM_MAP_CONV_ADDR( 7, B, SADDR, HW_WRAM_AREA_HALF + 0x00040000 ) + ), + REG_MI_MBK8_FIELD( REG_WRAM_MAP_CONV_ADDR( 8, C, EADDR, HW_WRAM_AREA_HALF + 0x00040000 ), + MI_WRAM_IMAGE_256KB, + REG_WRAM_MAP_CONV_ADDR( 8, C, SADDR, HW_WRAM_AREA_HALF ) + ), + // WRAM Lock { 0, diff --git a/include/firm/specfiles/ARM9-TS-FIRM.lcf.template b/include/firm/specfiles/ARM9-TS-FIRM.lcf.template index 87a0f705..e8bbb8f0 100644 --- a/include/firm/specfiles/ARM9-TS-FIRM.lcf.template +++ b/include/firm/specfiles/ARM9-TS-FIRM.lcf.template @@ -89,9 +89,9 @@ SECTIONS SDK_STATIC_START =.; SDK_STATIC_TEXT_START =.; #:::::::::: text/rodata + crt0_firm.o (.text) libsyscall.a (.text) OBJECT(_start,*) - crt0_firm.o (.text) crt0_firm.o (.rodata) # # .version セクションを追加しています。