diff --git a/build/components/hyena.TWL/src/main.c b/build/components/hyena.TWL/src/main.c index 12994a88..4e6679bf 100644 --- a/build/components/hyena.TWL/src/main.c +++ b/build/components/hyena.TWL/src/main.c @@ -34,7 +34,7 @@ #include #include #include -#include +#include #include #include "nvram_sp.h" diff --git a/build/libraries_sysmenu/boot/ARM7/src/bootAPI.c b/build/libraries_sysmenu/boot/ARM7/src/bootAPI.c index df1bd79f..03349957 100644 --- a/build/libraries_sysmenu/boot/ARM7/src/bootAPI.c +++ b/build/libraries_sysmenu/boot/ARM7/src/bootAPI.c @@ -16,6 +16,7 @@ *---------------------------------------------------------------------------*/ #include +#include #include #include "reboot.h" @@ -78,7 +79,7 @@ BOOL BOOT_WaitStart( void ) // メモリリストの設定 static u32 mem_list[PRE_CLEAR_NUM_MAX + 1 + COPY_NUM_MAX + 2 + POST_CLEAR_NUM_MAX + 1] = { - // pre clear + // pre clear SYSM_OWN_ARM7_MMEM_ADDR, SYSM_OWN_ARM7_MMEM_ADDR_END - SYSM_OWN_ARM7_MMEM_ADDR, SYSM_OWN_ARM9_MMEM_ADDR, SYSM_OWN_ARM9_MMEM_ADDR_END - SYSM_OWN_ARM9_MMEM_ADDR, SYSM_OWN_ARM7_WRAM_ADDR, SYSM_OWN_ARM7_WRAM_ADDR_END - SYSM_OWN_ARM7_WRAM_ADDR, @@ -89,11 +90,11 @@ BOOL BOOT_WaitStart( void ) #endif HW_MAIN_MEM_SHARED, HW_RED_RESERVED - HW_MAIN_MEM_SHARED, NULL, - // copy forward + // copy forward NULL, - // copy backward + // copy backward NULL, - // post clear + // post clear NULL, }; @@ -140,6 +141,11 @@ BOOL BOOT_WaitStart( void ) else { target = REBOOT_TARGET_DS_APP; + CDC_GoDsMode(); + // DSサウンド:DSP = 8:0 + // 32KHz + reg_SND_SMX_CNT = REG_SND_SMX_CNT_MIX_RATE_MASK | + REG_SND_SMX_CNT_E_MASK; } // リブート