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メモリマップ改変 (WRAM-ABCとして、0x3800000以下を使うことにした)

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git-svn-id: file:///Users/lillianskinner/Downloads/platinum/twl/TwlIPL/trunk@149 b08762b0-b915-fc4b-9d8c-17b2551a87ff
This commit is contained in:
yutaka 2007-11-12 07:38:05 +00:00
parent 21a6aae60b
commit 69c81e8e0f
6 changed files with 25 additions and 19 deletions
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16
build/nandfirm/menu-launcher/wram_regs/wram_regs.c
View File

@ -46,13 +46,13 @@ MIHeader_WramRegs wram_regs_init =
REG_MI_MBK_C6_FIELD( 1, MI_WRAM_BC_OFFSET_192KB, MI_WRAM_ARM7 ), REG_MI_MBK_C6_FIELD( 1, MI_WRAM_BC_OFFSET_192KB, MI_WRAM_ARM7 ),
REG_MI_MBK_C7_FIELD( 1, MI_WRAM_BC_OFFSET_224KB, MI_WRAM_ARM7 ), REG_MI_MBK_C7_FIELD( 1, MI_WRAM_BC_OFFSET_224KB, MI_WRAM_ARM7 ),
}, },
REG_MI_MBK6_FIELD( REG_WRAM_MAP_CONV_ADDR( 6, A, EADDR, HW_WRAM_AREA_HALF + 0x00040000 ), REG_MI_MBK6_FIELD( REG_WRAM_MAP_CONV_ADDR( 6, A, EADDR, HW_WRAM_AREA_HALF ),
MI_WRAM_IMAGE_256KB, MI_WRAM_IMAGE_256KB,
REG_WRAM_MAP_CONV_ADDR( 6, A, SADDR, HW_WRAM_AREA_HALF ) REG_WRAM_MAP_CONV_ADDR( 6, A, SADDR, HW_WRAM_AREA_HALF - HW_WRAM_A_SIZE )
), ),
REG_MI_MBK7_FIELD( REG_WRAM_MAP_CONV_ADDR( 7, B, EADDR, HW_WRAM_AREA_HALF + 0x00080000 ), REG_MI_MBK7_FIELD( REG_WRAM_MAP_CONV_ADDR( 7, B, EADDR, HW_WRAM_AREA + HW_WRAM_B_SIZE ),
MI_WRAM_IMAGE_256KB, MI_WRAM_IMAGE_256KB,
REG_WRAM_MAP_CONV_ADDR( 7, B, SADDR, HW_WRAM_AREA_HALF + 0x00040000 ) REG_WRAM_MAP_CONV_ADDR( 7, B, SADDR, HW_WRAM_AREA )
), ),
REG_MI_MBK8_FIELD( REG_WRAM_MAP_CONV_ADDR( 8, C, EADDR, MI_WRAM_MAP_NULL ), REG_MI_MBK8_FIELD( REG_WRAM_MAP_CONV_ADDR( 8, C, EADDR, MI_WRAM_MAP_NULL ),
MI_WRAM_IMAGE_256KB, MI_WRAM_IMAGE_256KB,
@ -64,13 +64,13 @@ MIHeader_WramRegs wram_regs_init =
MI_WRAM_IMAGE_256KB, MI_WRAM_IMAGE_256KB,
REG_WRAM_MAP_CONV_ADDR( 6, A, SADDR, MI_WRAM_MAP_NULL ) REG_WRAM_MAP_CONV_ADDR( 6, A, SADDR, MI_WRAM_MAP_NULL )
), ),
REG_MI_MBK7_FIELD( REG_WRAM_MAP_CONV_ADDR( 7, B, EADDR, HW_WRAM_AREA_HALF + 0x00080000 ), REG_MI_MBK7_FIELD( REG_WRAM_MAP_CONV_ADDR( 7, B, EADDR, HW_WRAM_AREA + HW_WRAM_B_SIZE ),
MI_WRAM_IMAGE_256KB, MI_WRAM_IMAGE_256KB,
REG_WRAM_MAP_CONV_ADDR( 7, B, SADDR, HW_WRAM_AREA_HALF + 0x00040000 ) REG_WRAM_MAP_CONV_ADDR( 7, B, SADDR, HW_WRAM_AREA )
), ),
REG_MI_MBK8_FIELD( REG_WRAM_MAP_CONV_ADDR( 8, C, EADDR, HW_WRAM_AREA_HALF + 0x00040000 ), REG_MI_MBK8_FIELD( REG_WRAM_MAP_CONV_ADDR( 8, C, EADDR, HW_WRAM_AREA_HALF - HW_WRAM_SIZE ),
MI_WRAM_IMAGE_256KB, MI_WRAM_IMAGE_256KB,
REG_WRAM_MAP_CONV_ADDR( 8, C, SADDR, HW_WRAM_AREA_HALF ) REG_WRAM_MAP_CONV_ADDR( 8, C, SADDR, HW_WRAM_AREA_HALF - HW_WRAM_SIZE - HW_WRAM_C_SIZE )
), ),
// WRAM Lock // WRAM Lock

16
build/nandfirm/sdmc-launcher/wram_regs/wram_regs.c
View File

@ -46,13 +46,13 @@ MIHeader_WramRegs wram_regs_init =
REG_MI_MBK_C6_FIELD( 1, MI_WRAM_BC_OFFSET_192KB, MI_WRAM_ARM7 ), REG_MI_MBK_C6_FIELD( 1, MI_WRAM_BC_OFFSET_192KB, MI_WRAM_ARM7 ),
REG_MI_MBK_C7_FIELD( 1, MI_WRAM_BC_OFFSET_224KB, MI_WRAM_ARM7 ), REG_MI_MBK_C7_FIELD( 1, MI_WRAM_BC_OFFSET_224KB, MI_WRAM_ARM7 ),
}, },
REG_MI_MBK6_FIELD( REG_WRAM_MAP_CONV_ADDR( 6, A, EADDR, HW_WRAM_AREA_HALF + 0x00040000 ), REG_MI_MBK6_FIELD( REG_WRAM_MAP_CONV_ADDR( 6, A, EADDR, HW_WRAM_AREA_HALF ),
MI_WRAM_IMAGE_256KB, MI_WRAM_IMAGE_256KB,
REG_WRAM_MAP_CONV_ADDR( 6, A, SADDR, HW_WRAM_AREA_HALF ) REG_WRAM_MAP_CONV_ADDR( 6, A, SADDR, HW_WRAM_AREA_HALF - HW_WRAM_A_SIZE )
), ),
REG_MI_MBK7_FIELD( REG_WRAM_MAP_CONV_ADDR( 7, B, EADDR, HW_WRAM_AREA_HALF + 0x00080000 ), REG_MI_MBK7_FIELD( REG_WRAM_MAP_CONV_ADDR( 7, B, EADDR, HW_WRAM_AREA + HW_WRAM_B_SIZE ),
MI_WRAM_IMAGE_256KB, MI_WRAM_IMAGE_256KB,
REG_WRAM_MAP_CONV_ADDR( 7, B, SADDR, HW_WRAM_AREA_HALF + 0x00040000 ) REG_WRAM_MAP_CONV_ADDR( 7, B, SADDR, HW_WRAM_AREA )
), ),
REG_MI_MBK8_FIELD( REG_WRAM_MAP_CONV_ADDR( 8, C, EADDR, MI_WRAM_MAP_NULL ), REG_MI_MBK8_FIELD( REG_WRAM_MAP_CONV_ADDR( 8, C, EADDR, MI_WRAM_MAP_NULL ),
MI_WRAM_IMAGE_256KB, MI_WRAM_IMAGE_256KB,
@ -64,13 +64,13 @@ MIHeader_WramRegs wram_regs_init =
MI_WRAM_IMAGE_256KB, MI_WRAM_IMAGE_256KB,
REG_WRAM_MAP_CONV_ADDR( 6, A, SADDR, MI_WRAM_MAP_NULL ) REG_WRAM_MAP_CONV_ADDR( 6, A, SADDR, MI_WRAM_MAP_NULL )
), ),
REG_MI_MBK7_FIELD( REG_WRAM_MAP_CONV_ADDR( 7, B, EADDR, HW_WRAM_AREA_HALF + 0x00080000 ), REG_MI_MBK7_FIELD( REG_WRAM_MAP_CONV_ADDR( 7, B, EADDR, HW_WRAM_AREA + HW_WRAM_B_SIZE ),
MI_WRAM_IMAGE_256KB, MI_WRAM_IMAGE_256KB,
REG_WRAM_MAP_CONV_ADDR( 7, B, SADDR, HW_WRAM_AREA_HALF + 0x00040000 ) REG_WRAM_MAP_CONV_ADDR( 7, B, SADDR, HW_WRAM_AREA )
), ),
REG_MI_MBK8_FIELD( REG_WRAM_MAP_CONV_ADDR( 8, C, EADDR, HW_WRAM_AREA_HALF + 0x00040000 ), REG_MI_MBK8_FIELD( REG_WRAM_MAP_CONV_ADDR( 8, C, EADDR, HW_WRAM_AREA_HALF - HW_WRAM_SIZE ),
MI_WRAM_IMAGE_256KB, MI_WRAM_IMAGE_256KB,
REG_WRAM_MAP_CONV_ADDR( 8, C, SADDR, HW_WRAM_AREA_HALF ) REG_WRAM_MAP_CONV_ADDR( 8, C, SADDR, HW_WRAM_AREA_HALF - HW_WRAM_SIZE - HW_WRAM_C_SIZE )
), ),
// WRAM Lock // WRAM Lock

2
include/firm/specfiles/ARM7-TS-FIRM.lcf.template
View File

@ -31,7 +31,7 @@ MEMORY
<END.OVERLAYS> <END.OVERLAYS>
arena.MAIN (RW) : ORIGIN = AFTER(<STATIC.NAME><FOREACH.OVERLAYS>,<OVERLAY.NAME><END.OVERLAYS>), LENGTH = 0x0 arena.MAIN (RW) : ORIGIN = AFTER(<STATIC.NAME><FOREACH.OVERLAYS>,<OVERLAY.NAME><END.OVERLAYS>), LENGTH = 0x0
check.WORKRAM (RWX) : ORIGIN = 0x037f8000, LENGTH = 0x48000 > workram.check check.WORKRAM (RWX) : ORIGIN = 0x037b8000, LENGTH = 0x48000 > workram.check
binary.LTDAUTOLOAD_TOP (RW) : ORIGIN = 0, LENGTH = 0x0 > <STATIC.NAME><PROPERTY.LTDSUFFIX> binary.LTDAUTOLOAD_TOP (RW) : ORIGIN = 0, LENGTH = 0x0 > <STATIC.NAME><PROPERTY.LTDSUFFIX>
<FOREACH.LTDAUTOLOADS> <FOREACH.LTDAUTOLOADS>

2
include/firm/specfiles/ARM7-TS-FIRM.lsf
View File

@ -20,7 +20,7 @@
Static $(TARGET_NAME) Static $(TARGET_NAME)
{ {
Address 0x037f8000 Address 0x037b8000
Object $(OBJS_STATIC) Object $(OBJS_STATIC)
Library $(LLIBS) $(GLIBS) $(CW_LIBS) Library $(LLIBS) $(GLIBS) $(CW_LIBS)
Object * (.etable) Object * (.etable)

6
include/firm/specfiles/ARM9-TS-FIRM.lcf.template
View File

@ -38,6 +38,7 @@ MEMORY
check.ITCM (RW) : ORIGIN = 0x0, LENGTH = 0x08000 > itcm.check check.ITCM (RW) : ORIGIN = 0x0, LENGTH = 0x08000 > itcm.check
check.DTCM (RW) : ORIGIN = 0x0, LENGTH = 0x04000 > dtcm.check check.DTCM (RW) : ORIGIN = 0x0, LENGTH = 0x04000 > dtcm.check
check.WORKRAM (RWX) : ORIGIN = 0x037c0000, LENGTH = 0x40000 > workram.check
binary.LTDAUTOLOAD_TOP (RW) : ORIGIN = 0, LENGTH = 0x0 > <STATIC.NAME><PROPERTY.LTDSUFFIX> binary.LTDAUTOLOAD_TOP (RW) : ORIGIN = 0, LENGTH = 0x0 > <STATIC.NAME><PROPERTY.LTDSUFFIX>
<FOREACH.LTDAUTOLOADS> <FOREACH.LTDAUTOLOADS>
@ -358,6 +359,11 @@ SECTIONS
. = . + 0x080 + SDK_IRQ_STACKSIZE + SDK_SYS_STACKSIZE * SDK_SYS_STACKSIZE_SIGN; . = . + 0x080 + SDK_IRQ_STACKSIZE + SDK_SYS_STACKSIZE * SDK_SYS_STACKSIZE_SIGN;
} > check.DTCM } > check.DTCM
.check.WORKRAM:
{
. = SDK_STATIC_BSS_END;
} > check.WORKRAM
########################### LTDAUTOLOADS ############################ ########################### LTDAUTOLOADS ############################
SDK_LTDAUTOLOAD.LTDMAIN.START = SDK_STATIC_BSS_END; SDK_LTDAUTOLOAD.LTDMAIN.START = SDK_STATIC_BSS_END;
SDK_LTDAUTOLOAD.LTDMAIN.END = SDK_LTDAUTOLOAD.LTDMAIN.START; SDK_LTDAUTOLOAD.LTDMAIN.END = SDK_LTDAUTOLOAD.LTDMAIN.START;

2
include/firm/specfiles/ARM9-TS-FIRM.lsf
View File

@ -20,7 +20,7 @@
Static $(TARGET_NAME) Static $(TARGET_NAME)
{ {
Address 0x03800000 Address 0x037c0000
Object $(OBJS_STATIC) Object $(OBJS_STATIC)
Library $(LLIBS) $(GLIBS) $(CW_LIBS) Library $(LLIBS) $(GLIBS) $(CW_LIBS)
Object * (.itcm) Object * (.itcm)