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hyenaコンポーネントのWRAM割り当て拡張。WRAM_Bを4スロット使ったので、次はかなりアクロバティックにしないとだめ。

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git-svn-id: file:///Users/lillianskinner/Downloads/platinum/twl/TwlIPL/branches/20080626_SDK500fc_plus5_branch@1739 b08762b0-b915-fc4b-9d8c-17b2551a87ff
This commit is contained in:
yosiokat 2008-06-27 00:44:47 +00:00
parent a18c6a7937
commit 45ff846fd9
3 changed files with 7 additions and 5 deletions
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2
build/components/hyena.TWL/Makefile
View File

@ -81,7 +81,7 @@ ifeq ($(DEFAULT_COMP_ARM7),hyena)
MACRO_FLAGS += -DUSE_HYENA_COMPONENT
endif
MAKELCF_FLAGS += -DADDRESS_LTDWRAM='0x037a8000' \
MAKELCF_FLAGS += -DADDRESS_LTDWRAM='0x037a0000' \
-DADDRESS_FLXMAIN='0x02280200' \
-DADDRESS_BOOTCORE='0x0380f000' \
-DCRT0_O='$(CRT0_O)'

2
build/components/hyena.TWL/hyena.lcf.template
View File

@ -33,7 +33,7 @@ MEMORY
<OVERLAY.NAME> (RWXO): ORIGIN = <OVERLAY.ADDRESS>, LENGTH = 0x0 > <OVERLAY.NAME><PROPERTY.FLXSUFFIX>
<END.OVERLAYS>
check.WORKRAM (RWX) : ORIGIN = 0x037a8000, LENGTH = 0x62000 > workram.check
check.WORKRAM (RWX) : ORIGIN = 0x037a0000, LENGTH = 0x6a000 > workram.check
binary.LTDAUTOLOAD_TOP (RW) : ORIGIN = 0, LENGTH = 0x0 > <STATIC.NAME><PROPERTY.LTDSUFFIX>
<FOREACH.LTDAUTOLOADS>

8
build/components/hyena.TWL/wram_regs/wram_regs.c
View File

@ -25,8 +25,10 @@
// MAP_TS_LTD for hyena
// WRAM-A Lock:ON, Master:ARM7, Enable:Slot0-3(256Kbytes), Address(7):0x037c0000-0x037fffff, Address(9):None
// WRAM-B Lock:ON, Master:ARM7, Enable:Slot5-7(96Kbytes), Address(7):0x037a8000-0x037bffff, Address(9):None
// WRAM-B Lock:OFF, Master:ARM9, Enable:Slot0-4(160Kbytes), Address(7):0x03740000-0x037bffff, Address(9):0x03740000-0x037bffff
// WRAM-B Lock:ON, Master:ARM7, Enable:Slot4-7(128Kbytes), Address(7):0x03760000-0x0377ffff, Address(9):None
// Address(7):0x037a0000-0x037bffff, Address(9):None
// WRAM-B Lock:OFF, Master:ARM9, Enable:Slot0-3(128Kbytes), Address(7):0x03740000-0x0375ffff, Address(9):0x03740000-0x0375ffff
// Address(7):0x03780000-0x0379ffff, Address(9):0x03780000-0x0379ffff
// WRAM-C Lock:OFF, Msster:ARM9, Enable:Slot0-7(256Kbytes), Address(7):0x03700000-0x0373ffff, Address(9):0x03700000-0x0373ffff
// WRAM-0 Master:ARM9, (16Kbytes), Address(7):0x03040000-0x03043fff, Address(9):0x03040000-0x03043fff
// WRAM-1 Master:ARM9, (16Kbytes), Address(7):0x03044000-0x03047fff, Address(9):0x03044000-0x03047fff
@ -106,7 +108,7 @@ u32 HYENA_WramReg[0x30/sizeof(u32)] =
// WRAM Lock
(u32)(
(0x0F << 0) |
(0xE0 << 8) |
(0xF0 << 8) |
(0x00 << 16) |
// WRAM-0/1