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リセットの確認後にメインメモリを初期化
git-svn-id: file:///Users/lillianskinner/Downloads/platinum/twl/TwlIPL/trunk@42 b08762b0-b915-fc4b-9d8c-17b2551a87ff
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@ -87,6 +87,26 @@ SDK_WEAK_SYMBOL asm void _start( void )
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msr cpsr_csfx, r0
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msr cpsr_csfx, r0
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sub sp, r1, #4 // 4byte for stack check code
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sub sp, r1, #4 // 4byte for stack check code
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//---- read reset flag from pmic
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#ifdef TWL_PLATFORM_TS
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mov r0, #REG_PMIC_SW_FLAGS_ADDR
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bl PMi_GetRegister
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ands r0, r0, #PMIC_SW_FLAGS_WARMBOOT
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movne r0, #FIRM_PXI_ID_WARMBOOT
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moveq r0, #FIRM_PXI_ID_COLDBOOT
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bl PXI_SendByIntf
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mov r0, #FIRM_PXI_ID_INIT_MMEM
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bl PXI_WaitByIntf
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#endif // TWL_PLATFORM_TS
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//---- wait for main memory mode into burst mode
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ldr r3, =REG_EXMEMCNT_L_ADDR
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mov r1, #REG_MI_EXMEMCNT_L_ECE2_MASK
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@1:
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ldrh r2, [r3]
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tst r2, r1
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beq @1
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#if 0
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#if 0
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// move parameters from IPL's work memory to shared area
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// move parameters from IPL's work memory to shared area
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ldr r0, =IPL_PARAM_CARD_ROM_HEADER
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ldr r0, =IPL_PARAM_CARD_ROM_HEADER
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@ -106,14 +126,6 @@ SDK_WEAK_SYMBOL asm void _start( void )
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bmi @1_2
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bmi @1_2
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#endif
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#endif
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//---- wait for main memory mode into burst mode
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ldr r3, =REG_EXMEMCNT_L_ADDR
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mov r1, #REG_MI_EXMEMCNT_L_ECE2_MASK
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@1:
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ldrh r2, [r3]
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tst r2, r1
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beq @1
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//---- load autoload block and initialize bss
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//---- load autoload block and initialize bss
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bl do_autoload
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bl do_autoload
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@ -64,12 +64,6 @@ SDK_WEAK_SYMBOL asm void _start( void )
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mov r12, #HW_REG_BASE
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mov r12, #HW_REG_BASE
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str r12, [r12, #REG_IME_OFFSET]
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str r12, [r12, #REG_IME_OFFSET]
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//---- initialize Main Memory
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bl MIi_InitMainMemCR
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//---- initialize cp15
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bl init_cp15
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//---- initialize stack pointer
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//---- initialize stack pointer
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// SVC mode
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// SVC mode
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mov r0, #HW_PSR_SVC_MODE
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mov r0, #HW_PSR_SVC_MODE
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@ -94,6 +88,29 @@ SDK_WEAK_SYMBOL asm void _start( void )
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mov r0, #HW_PSR_SYS_MODE
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mov r0, #HW_PSR_SYS_MODE
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msr cpsr_csfx, r0
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msr cpsr_csfx, r0
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sub sp, r1, #4 // 4byte for stack check code
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sub sp, r1, #4 // 4byte for stack check code
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//---- read reset flag from pmic
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#ifdef TWL_PLATFORM_TS
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@0: bl PXI_RecvByIntf
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cmp r0, #FIRM_PXI_ID_COLDBOOT
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cmpne r0, #FIRM_PXI_ID_WARMBOOT
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bne @0
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//---- initialize Main Memory
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cmp r0, #FIRM_PXI_ID_COLDBOOT
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bleq MIi_InitMainMemCR
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mov r0, #FIRM_PXI_ID_INIT_MMEM
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bl PXI_SendByIntf
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#else // TWL_PLATFORM_BB
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//---- initialize Main Memory
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bl MIi_InitMainMemCR
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#endif // TWL_PLATFORM_BB
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//---- initialize cp15
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bl init_cp15
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//---- clear memory
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//---- clear memory
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// DTCM (16KB)
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// DTCM (16KB)
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@ -28,22 +28,24 @@ extern "C" {
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typedef enum
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typedef enum
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{
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{
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// from ARM7
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// from ARM7
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FIRM_PXI_ID_INIT_ARM7 = 3,
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FIRM_PXI_ID_COLDBOOT = 1,
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FIRM_PXI_ID_LOAD_HEADER = 8,
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FIRM_PXI_ID_WARMBOOT = 2,
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FIRM_PXI_ID_INIT_ARM7 = 7,
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FIRM_PXI_ID_LOAD_HEADER = 6,
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FIRM_PXI_ID_LOAD_ARM9_STATIC = 5,
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FIRM_PXI_ID_LOAD_ARM9_STATIC = 5,
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FIRM_PXI_ID_LOAD_ARM7_STATIC = 6,
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FIRM_PXI_ID_LOAD_ARM7_STATIC = 4,
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FIRM_PXI_ID_LOAD_ARM9_LTD_STATIC = 9,
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FIRM_PXI_ID_LOAD_ARM9_LTD_STATIC = 3,
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FIRM_PXI_ID_LOAD_ARM7_LTD_STATIC = 10,
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FIRM_PXI_ID_LOAD_ARM7_LTD_STATIC = 2,
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FIRM_PXI_ID_LOAD_PIRIOD = 11,
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FIRM_PXI_ID_LOAD_PIRIOD = 1,
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// from ARM9
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// from ARM9
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FIRM_PXI_ID_INIT_ARM9 = 1,
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FIRM_PXI_ID_INIT_ARM9 = 9,
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FIRM_PXI_ID_AUTH_HEADER = 8,
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FIRM_PXI_ID_AUTH_HEADER = 10,
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FIRM_PXI_ID_AUTH_ARM9_STATIC = 5,
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FIRM_PXI_ID_AUTH_ARM9_STATIC = 11,
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FIRM_PXI_ID_AUTH_ARM7_STATIC = 6,
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FIRM_PXI_ID_AUTH_ARM7_STATIC = 12,
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FIRM_PXI_ID_AUTH_ARM9_LTD_STATIC = 9,
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FIRM_PXI_ID_AUTH_ARM9_LTD_STATIC = 13,
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FIRM_PXI_ID_AUTH_ARM7_LTD_STATIC = 10,
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FIRM_PXI_ID_AUTH_ARM7_LTD_STATIC = 14,
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FIRM_PXI_ID_DONE_WRAM_SETTING = 11,
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// from both of ARM9 and ARM7
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// from both of ARM9 and ARM7
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FIRM_PXI_ID_NULL = 0,
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FIRM_PXI_ID_NULL = 0,
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