mirror of
https://github.com/rvtr/GodMode9i.git
synced 2025-06-18 19:05:30 -04:00
382 lines
9.4 KiB
C++
382 lines
9.4 KiB
C++
/*
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* savegame_manager: a tool to backup and restore savegames from Nintendo
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* DS cartridges. Nintendo DS and all derivative names are trademarks
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* by Nintendo. EZFlash 3-in-1 is a trademark by EZFlash.
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*
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* gba.cpp: Functions for working with the GBA-slot on a Nintendo DS.
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* EZFlash 3-in-1 functions are found in dsCard.h/.cpp
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*
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* Copyright (C) Pokedoc (2010)
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*/
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/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <nds.h>
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#include <fat.h>
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#include <sys/iosupport.h>
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#include <unistd.h>
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#include <stdio.h>
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#include <string.h>
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#include <math.h>
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#include <sys/unistd.h>
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#include <algorithm>
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#include <nds/dma.h>
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#include <dirent.h>
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#include "gba.h"
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inline u32 min(u32 i, u32 j) { return (i < j) ? i : j;}
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inline u32 max(u32 i, u32 j) { return (i > j) ? i : j;}
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// -----------------------------------------------------
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#define MAGIC_EEPR 0x52504545
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#define MAGIC_SRAM 0x4d415253
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#define MAGIC_FLAS 0x53414c46
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#define MAGIC_H1M_ 0x5f4d3148
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// -----------------------------------------------------------
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bool gbaIsGame()
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{
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// look for some magic bytes of the compressed Nintendo logo
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uint32 *data = (uint32*)0x08000004;
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if (*data == 0x51aeff24) {
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data ++; data ++;
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if (*data == 0x0a82843d)
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return true;
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}
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return false;
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}
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void readEeprom(u8 *dst, u32 src, u32 len) {
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// EEPROM reading needs to happen on ARM7
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sysSetCartOwner(BUS_OWNER_ARM7);
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fifoSendValue32(FIFO_USER_01, 0x44414552 /* 'READ' */);
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fifoSendAddress(FIFO_USER_01, dst);
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fifoSendValue32(FIFO_USER_01, src);
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fifoSendValue32(FIFO_USER_01, len);
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// Read the data from FIFO
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u8 *ptr = dst;
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while(ptr < dst + len) {
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if(fifoCheckDatamsg(FIFO_USER_02)) {
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fifoGetDatamsg(FIFO_USER_02, 8, ptr);
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ptr += 8;
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}
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}
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sysSetCartOwner(BUS_OWNER_ARM9);
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}
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void writeEeprom(u32 dst, u8 *src, u32 len) {
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// EEPROM writing needs to happen on ARM7
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sysSetCartOwner(BUS_OWNER_ARM7);
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fifoSendValue32(FIFO_USER_01, 0x54495257 /* 'WRIT' */);
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fifoSendValue32(FIFO_USER_01, dst);
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fifoSendAddress(FIFO_USER_01, src);
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fifoSendValue32(FIFO_USER_01, len);
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// Wait for it to finish
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while(!(fifoCheckValue32(FIFO_USER_02) && fifoGetValue32(FIFO_USER_02) == 0x454E4F44 /* 'DONE' */)) {
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swiWaitForVBlank();
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}
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sysSetCartOwner(BUS_OWNER_ARM9);
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}
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saveTypeGBA gbaGetSaveType() {
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// Search for any one of the magic version strings in the ROM. They are always dword-aligned.
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uint32 *data = (uint32*)0x08000000;
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for (int i = 0; i < (0x02000000 >> 2); i++, data++) {
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if (*data == MAGIC_EEPR) {
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u8 *buffer = new u8[0x2000];
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readEeprom(buffer, 0, 0x2000);
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// Check if first 0x800 bytes are duplicates of the first 8
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for(int j = 8; j < 0x800; j += 8) {
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if(memcmp(buffer, buffer + j, 8) != 0) {
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delete[] buffer;
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return SAVE_GBA_EEPROM_8;
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}
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}
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delete[] buffer;
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return SAVE_GBA_EEPROM_05;
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} else if (*data == MAGIC_SRAM) {
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// *always* 32 kB
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return SAVE_GBA_SRAM_32;
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} else if (*data == MAGIC_FLAS) {
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// 64 kB oder 128 kB
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uint32 *data2 = data + 1;
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if (*data2 == MAGIC_H1M_)
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return SAVE_GBA_FLASH_128;
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else
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return SAVE_GBA_FLASH_64;
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}
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}
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return SAVE_GBA_NONE;
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}
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uint32 gbaGetSaveSizeLog2(saveTypeGBA type)
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{
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if (type == SAVE_GBA_NONE)
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type = gbaGetSaveType();
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switch (type) {
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case SAVE_GBA_EEPROM_05:
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return 9;
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case SAVE_GBA_EEPROM_8:
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return 13;
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case SAVE_GBA_SRAM_32:
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return 15;
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case SAVE_GBA_FLASH_64:
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return 16;
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case SAVE_GBA_FLASH_128:
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return 17;
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case SAVE_GBA_NONE:
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default:
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return 0;
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}
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}
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uint32 gbaGetSaveSize(saveTypeGBA type)
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{
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if (type == SAVE_GBA_NONE)
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return 0;
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else
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return 1 << gbaGetSaveSizeLog2(type);
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}
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bool gbaReadSave(u8 *dst, u32 src, u32 len, saveTypeGBA type)
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{
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int nbanks = 2; // for type 4,5
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switch (type) {
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case SAVE_GBA_EEPROM_05:
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case SAVE_GBA_EEPROM_8: {
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readEeprom(dst, src, len);
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break;
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}
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case SAVE_GBA_SRAM_32: {
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// SRAM: blind copy
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int start = 0x0a000000 + src;
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u8 *tmpsrc = (u8*)start;
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sysSetBusOwners(true, true);
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for (u32 i = 0; i < len; i++, tmpsrc++, dst++)
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*dst = *tmpsrc;
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break;
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}
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case SAVE_GBA_FLASH_64:
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// FLASH - must be opend by register magic, then blind copy
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nbanks = 1;
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case SAVE_GBA_FLASH_128:
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for (int j = 0; j < nbanks; j++) {
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// we need to wait a few cycles before the hardware reacts!
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*(vu8*)0x0a005555 = 0xaa;
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swiDelay(10);
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*(vu8*)0x0a002aaa = 0x55;
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swiDelay(10);
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*(vu8*)0x0a005555 = 0xb0;
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swiDelay(10);
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*(vu8*)0x0a000000 = (u8)j;
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swiDelay(10);
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u32 start, sublen;
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if (j == 0) {
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start = 0x0a000000 + src;
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sublen = (src < 0x10000) ? min(len, (1 << 16) - src) : 0;
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} else if (j == 1) {
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start = max(0x09ff0000 + src, 0x0a000000);
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sublen = (src + len < 0x10000) ? 0 : min(len, len - (0x10000 - src));
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}
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u8 *tmpsrc = (u8*)start;
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sysSetBusOwners(true, true);
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for (u32 i = 0; i < sublen; i++, tmpsrc++, dst++)
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*dst = *tmpsrc;
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}
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break;
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case SAVE_GBA_NONE:
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break;
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}
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return true;
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}
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bool gbaIsAtmel()
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{
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*(vu8*)0x0a005555 = 0xaa;
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swiDelay(10);
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*(vu8*)0x0a002aaa = 0x55;
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swiDelay(10);
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*(vu8*)0x0a005555 = 0x90; // ID mode
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swiDelay(10);
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//
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u8 dev = *(u8*)0x0a000001;
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u8 man = *(u8*)0x0a000000;
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//
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*(vu8*)0x0a005555 = 0xaa;
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swiDelay(10);
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*(vu8*)0x0a002aaa = 0x55;
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swiDelay(10);
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*(vu8*)0x0a005555 = 0xf0; // leave ID mode
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swiDelay(10);
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//
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//char txt[128];
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// sprintf(txt, "Man: %x, Dev: %x", man, dev);
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// displayStateF(STR_STR, txt);
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if ((man == 0x3d) && (dev == 0x1f))
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return true;
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else
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return false;
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}
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bool gbaWriteSave(u32 dst, u8 *src, u32 len, saveTypeGBA type)
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{
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int nbanks = 2; // for type 4,5
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switch (type) {
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case SAVE_GBA_EEPROM_05:
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case SAVE_GBA_EEPROM_8: {
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writeEeprom(dst, src, len);
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break;
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}
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case SAVE_GBA_SRAM_32: {
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// SRAM: blind write
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u32 start = 0x0a000000 + dst;
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u8 *tmpdst = (u8*)start;
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sysSetBusOwners(true, true);
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for (u32 i = 0; i < len; i++, tmpdst++, src++) {
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*tmpdst = *src;
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swiDelay(10); // mabe we don't need this, but better safe than sorry
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}
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break;
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}
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case SAVE_GBA_FLASH_64: {
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bool atmel = gbaIsAtmel();
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if (atmel) {
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// only 64k, no bank switching required
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u32 len7 = len >> 7;
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u8 *tmpdst = (u8*)(0x0a000000+dst);
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for (u32 j = 0; j < len7; j++) {
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u32 ime = enterCriticalSection();
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*(vu8*)0x0a005555 = 0xaa;
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swiDelay(10);
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*(vu8*)0x0a002aaa = 0x55;
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swiDelay(10);
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*(vu8*)0x0a005555 = 0xa0;
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swiDelay(10);
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for (int i = 0; i < 128; i++) {
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*tmpdst = *src;
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swiDelay(10);
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}
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leaveCriticalSection(ime);
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while (*tmpdst != *src) {swiDelay(10);}
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}
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break;
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}
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nbanks = 1;
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}
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case SAVE_GBA_FLASH_128:
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// FLASH - must be opend by register magic, erased and then rewritten
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// FIXME: currently, you can only write "all or nothing"
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nbanks = 2;
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for (int j = 0; j < nbanks; j++) {
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*(vu8*)0x0a005555 = 0xaa;
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swiDelay(10);
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*(vu8*)0x0a002aaa = 0x55;
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swiDelay(10);
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*(vu8*)0x0a005555 = 0xb0;
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swiDelay(10);
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*(vu8*)0x0a000000 = (u8)j;
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swiDelay(10);
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//
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u32 start, sublen;
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if (j == 0) {
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start = 0x0a000000 + dst;
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sublen = (dst < 0x10000) ? min(len, (1 << 16) - dst) : 0;
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} else if (j == 1) {
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start = max(0x09ff0000 + dst, 0x0a000000);
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sublen = (dst + len < 0x10000) ? 0 : min(len, len - (0x10000 - dst));
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}
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u8 *tmpdst = (u8*)start;
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sysSetBusOwners(true, true);
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for (u32 i = 0; i < sublen; i++, tmpdst++, src++) {
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// we need to wait a few cycles before the hardware reacts!
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*(vu8*)0x0a005555 = 0xaa;
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swiDelay(10);
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*(vu8*)0x0a002aaa = 0x55;
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swiDelay(10);
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*(vu8*)0x0a005555 = 0xa0; // write byte command
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swiDelay(10);
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//
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*tmpdst = *src;
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swiDelay(10);
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//
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while (*tmpdst != *src) {swiDelay(10);}
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}
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}
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break;
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case SAVE_GBA_NONE:
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break;
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}
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return true;
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}
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bool gbaFormatSave(saveTypeGBA type)
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{
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switch (type) {
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case SAVE_GBA_EEPROM_05:
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case SAVE_GBA_EEPROM_8:
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// EEPROM doesn't need erasing
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break;
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case SAVE_GBA_SRAM_32:
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{
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// memset(data, 0, 1 << 15);
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u8 *data = new u8[1 << 15]();
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gbaWriteSave(0, data, 1 << 15, SAVE_GBA_SRAM_32);
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delete[] data;
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}
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break;
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case SAVE_GBA_FLASH_64:
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case SAVE_GBA_FLASH_128:
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*(vu8*)0x0a005555 = 0xaa;
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swiDelay(10);
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*(vu8*)0x0a002aaa = 0x55;
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swiDelay(10);
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*(vu8*)0x0a005555 = 0x80; // erase command
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swiDelay(10);
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*(vu8*)0x0a005555 = 0xaa;
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swiDelay(10);
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*(vu8*)0x0a002aaa = 0x55;
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swiDelay(10);
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*(vu8*)0x0a005555 = 0x10; // erase entire chip
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swiDelay(10);
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while (*(u8*)0x0a000000 != 0xff)
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swiDelay(10);
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break;
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case SAVE_GBA_NONE:
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break;
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}
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return true;
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}
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