mirror of
https://github.com/rvtr/GodMode9i.git
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177 lines
3.4 KiB
ArmAsm
177 lines
3.4 KiB
ArmAsm
/*-----------------------------------------------------------------
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Copyright (C) 2010 Dave "WinterMute" Murphy
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This program is free software; you can redistribute it and/or
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modify it under the terms of the GNU General Public License
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as published by the Free Software Foundation; either version 2
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of the License, or (at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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------------------------------------------------------------------*/
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.global _start
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//-----------------------------------------------------------------
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_start:
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//-----------------------------------------------------------------
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.ascii "bootstub"
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.word hook7from9 - _start
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.word hook9from7 - _start
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_loader_size:
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.word 0
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.arch armv4t
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.cpu arm7tdmi
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//-----------------------------------------------------------------
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hook9from7:
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//-----------------------------------------------------------------
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ldr r0, arm9bootaddr
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adr r1, hook7from9
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str r1, [r0]
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mov r3, #0x04000000
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ldr r0, resetcode
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str r0, [r3, #0x188]
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add r3, r3, #0x180
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adr r0, waitcode_start
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ldr r1, arm7base
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adr r2, waitcode_end
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1: ldr r4, [r0],#4
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str r4, [r1],#4
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cmp r2, r0
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bne 1b
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ldr r1, arm7base
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bx r1
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//-----------------------------------------------------------------
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waitcode_start:
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//-----------------------------------------------------------------
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push {lr}
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mov r2, #1
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bl waitsync
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mov r0, #0x100
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strh r0, [r3]
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mov r2, #0
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bl waitsync
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mov r0, #0
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strh r0, [r3]
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pop {lr}
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bx lr
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waitsync:
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ldrh r0, [r3]
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and r0, r0, #0x000f
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cmp r0, r2
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bne waitsync
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bx lr
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waitcode_end:
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arm7base:
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.word 0x037f8000
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arm7bootaddr:
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.word 0x02FFFE34
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arm9bootaddr:
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.word 0x02FFFE24
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tcmpudisable:
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.word 0x2078
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resetcode:
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.word 0x0c04000c
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//-----------------------------------------------------------------
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hook7from9:
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//-----------------------------------------------------------------
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mov r12, #0x04000000
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strb r12, [r12,#0x208]
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.arch armv5te
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.cpu arm946e-s
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ldr r1, tcmpudisable @ disable TCM and protection unit
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mcr p15, 0, r1, c1, c0
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@ Disable cache
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mov r0, #0
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mcr p15, 0, r0, c7, c5, 0 @ Instruction cache
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mcr p15, 0, r0, c7, c6, 0 @ Data cache
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mcr p15, 0, r0, c3, c0, 0 @ write buffer
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@ Wait for write buffer to empty
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mcr p15, 0, r0, c7, c10, 4
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add r3, r12, #0x180 @ r3 = 4000180
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mov r0,#0x80
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strb r0,[r3,#0x242-0x180]
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adr r0, _loader
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ldr r2, _loader_size
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mov r1, #0x06800000
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add r1, r1, #0x40000
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add r2, r0, r2
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_copyloader:
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ldr r4, [r0], #4
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str r4, [r1], #4
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cmp r0, r2
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blt _copyloader
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mov r0,#0x82
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strb r0,[r3,#0x242-0x180]
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ldrh r0,[r3,#0x204-0x180]
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orr r0,r0,#(1<<11) | (1<<7)
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strh r0,[r3,#0x204-0x180]
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ldr r0, arm7bootaddr
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mov r1, #0x06000000
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str r1, [r0]
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ldr r0, resetcode
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str r0, [r12, #0x188]
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mov r2, #1
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bl waitsync
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mov r0, #0x100
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strh r0, [r3]
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mov r2, #0
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bl waitsync
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mov r0, #0
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strh r0, [r3]
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// set up and enter passme loop
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ldr r0,arm9branchaddr
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ldr r1,branchinst
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str r1,[r0]
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str r0,[r0,#0x20]
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bx r0
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branchinst:
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.word 0xE59FF018
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arm9branchaddr:
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.word 0x02fffe04
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_loader:
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