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Update arm9clear.arm.c

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This commit is contained in:
RocketRobz 2024-03-08 02:20:02 -07:00
parent 4cabc9d09f
commit 5de1523864
1 changed files with 9 additions and 1 deletions
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10
bootloader/source/arm9clear.arm.c
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@ -4,6 +4,7 @@
#include <nds/ndstypes.h> #include <nds/ndstypes.h>
#include <nds/dma.h> #include <nds/dma.h>
#include <nds/system.h> #include <nds/system.h>
#include <nds/ipc.h>
#include <nds/interrupts.h> #include <nds/interrupts.h>
#include <nds/timers.h> #include <nds/timers.h>
@ -22,7 +23,7 @@ Modified by Chishm:
--------------------------------------------------------------------------*/ --------------------------------------------------------------------------*/
void __attribute__ ((long_call)) __attribute__((naked)) __attribute__((noreturn)) resetMemory2_ARM9 (void) void __attribute__ ((long_call)) __attribute__((naked)) __attribute__((noreturn)) resetMemory2_ARM9 (void)
{ {
register int i; register int i, reg;
//clear out ARM9 DMA channels //clear out ARM9 DMA channels
for (i=0; i<4; i++) { for (i=0; i<4; i++) {
@ -31,8 +32,14 @@ void __attribute__ ((long_call)) __attribute__((naked)) __attribute__((noreturn)
DMA_DEST(i) = 0; DMA_DEST(i) = 0;
TIMER_CR(i) = 0; TIMER_CR(i) = 0;
TIMER_DATA(i) = 0; TIMER_DATA(i) = 0;
for (reg=0; reg<0x1c; reg+=4)*((vu32*)(0x04004104 + ((i*0x1c)+reg))) = 0;//Reset NDMA.
} }
// Clear out FIFO
REG_IPC_SYNC = 0;
REG_IPC_FIFO_CR = IPC_FIFO_ENABLE | IPC_FIFO_SEND_CLEAR;
REG_IPC_FIFO_CR = 0;
VRAM_CR = (VRAM_CR & 0xffff0000) | 0x00008080 ; VRAM_CR = (VRAM_CR & 0xffff0000) | 0x00008080 ;
vu16 *mainregs = (vu16*)0x04000000; vu16 *mainregs = (vu16*)0x04000000;
@ -44,6 +51,7 @@ void __attribute__ ((long_call)) __attribute__((naked)) __attribute__((noreturn)
} }
REG_DISPSTAT = 0; REG_DISPSTAT = 0;
GFX_STATUS = 0;
VRAM_A_CR = 0; VRAM_A_CR = 0;
VRAM_B_CR = 0; VRAM_B_CR = 0;