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Improve extended header reading

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Pk11 2021-10-04 20:27:20 -05:00
parent 7b105c09a1
commit 0dedcfb9dd
1 changed files with 16 additions and 21 deletions
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37
arm9/source/read_card.c
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@ -64,7 +64,7 @@ static bool twlBlowfish = false;
static bool normalChip = false; // As defined by GBAtek, normal chip secure area is accessed in blocks of 0x200, other chip in blocks of 0x1000 static bool normalChip = false; // As defined by GBAtek, normal chip secure area is accessed in blocks of 0x200, other chip in blocks of 0x1000
static bool nandChip = false; static bool nandChip = false;
static bool nandRomMode = true; static int nandRomMode = -1;
static u32 portFlags = 0; static u32 portFlags = 0;
static u32 headerData[0x1000/sizeof(u32)] = {0}; static u32 headerData[0x1000/sizeof(u32)] = {0};
static u32 secureArea[CARD_SECURE_AREA_SIZE/sizeof(u32)] = {0}; static u32 secureArea[CARD_SECURE_AREA_SIZE/sizeof(u32)] = {0};
@ -290,8 +290,9 @@ static void switchToTwlBlowfish(sNDSHeaderExt* ndsHeader) {
int cardInit (sNDSHeaderExt* ndsHeader) int cardInit (sNDSHeaderExt* ndsHeader)
{ {
u32 portFlagsKey1, portFlagsSecRead; u32 portFlagsKey1, portFlagsSecRead;
normalChip = false; // As defined by GBAtek, normal chip secure area is accessed in blocks of 0x200, other chip in blocks of 0x1000 normalChip = false; // As defined by GBAtek, normal chip secure area and header are accessed in blocks of 0x200, other chip in blocks of 0x1000
nandRomMode = true; nandChip = false;
nandRomMode = -1;
int secureBlockNumber; int secureBlockNumber;
int i; int i;
u8 cmdData[8] __attribute__ ((aligned)); u8 cmdData[8] __attribute__ ((aligned));
@ -330,14 +331,9 @@ int cardInit (sNDSHeaderExt* ndsHeader)
u32 iCardId=cardReadID(CARD_CLK_SLOW); u32 iCardId=cardReadID(CARD_CLK_SLOW);
while(REG_ROMCTRL & CARD_BUSY); while(REG_ROMCTRL & CARD_BUSY);
//u32 iCheapCard=iCardId&0x80000000;
// Check if NAND normalChip = (iCardId & BIT(31)) != 0; // ROM chip ID MSB
nandChip = (iCardId >> 24) & BIT(3); nandChip = (iCardId & BIT(27)) != 0; // Card has a NAND chip
if (nandChip) {
// cardParamCommand(CARD_CMD_NAND_ROM_MODE, 0, CARD_ACTIVATE | CARD_nRESET | CARD_CLK_SLOW | CARD_BLK_SIZE(7) | CARD_DELAY1(0x1FFF) | CARD_DELAY2(0x3F), NULL, 0);
nandRomMode = true;
}
// Read the header // Read the header
cardParamCommand (CARD_CMD_HEADER_READ, 0, cardParamCommand (CARD_CMD_HEADER_READ, 0,
@ -349,7 +345,7 @@ int cardInit (sNDSHeaderExt* ndsHeader)
if ((ndsHeader->unitCode != 0) || (ndsHeader->dsi_flags != 0)) if ((ndsHeader->unitCode != 0) || (ndsHeader->dsi_flags != 0))
{ {
// Extended header found // Extended header found
if(true) { // TODO: some need single 1000h? if(normalChip) {
for(int i = 0; i < 8; i++) { for(int i = 0; i < 8; i++) {
cardParamCommand (CARD_CMD_HEADER_READ, i * 0x200, cardParamCommand (CARD_CMD_HEADER_READ, i * 0x200,
CARD_ACTIVATE | CARD_nRESET | CARD_CLK_SLOW | CARD_BLK_SIZE(1) | CARD_DELAY1(0x1FFF) | CARD_DELAY2(0x3F), CARD_ACTIVATE | CARD_nRESET | CARD_CLK_SLOW | CARD_BLK_SIZE(1) | CARD_DELAY1(0x1FFF) | CARD_DELAY2(0x3F),
@ -391,7 +387,6 @@ int cardInit (sNDSHeaderExt* ndsHeader)
((ndsHeader->cardControlBF & (CARD_CLK_SLOW|CARD_DELAY1(0x1FFF))) + ((ndsHeader->cardControlBF & CARD_DELAY2(0x3F)) >> 16)); ((ndsHeader->cardControlBF & (CARD_CLK_SLOW|CARD_DELAY1(0x1FFF))) + ((ndsHeader->cardControlBF & CARD_DELAY2(0x3F)) >> 16));
// Adjust card transfer method depending on the most significant bit of the chip ID // Adjust card transfer method depending on the most significant bit of the chip ID
normalChip = (iCardId & 0x80000000) != 0; // ROM chip ID MSB
if (!normalChip) { if (!normalChip) {
portFlagsKey1 |= CARD_SEC_LARGE; portFlagsKey1 |= CARD_SEC_LARGE;
} }
@ -497,15 +492,15 @@ void cardRead (u32 src, void* dest)
return; return;
} }
if (nandChip) { // if (nandChip) {
if (src < ndsHeader->nandRomEnd * 0x20000 /*dsi: 80000h?*/ && !nandRomMode) { // if (src < ndsHeader->nandRomEnd * 0x20000 /*dsi: 80000h?*/ && nandRomMode != CARD_CMD_NAND_ROM_MODE) {
cardParamCommand(CARD_CMD_NAND_ROM_MODE, 0, CARD_ACTIVATE | CARD_nRESET | CARD_CLK_SLOW | CARD_BLK_SIZE(7) | CARD_DELAY1(0x1FFF) | CARD_DELAY2(0x3F), NULL, 0); // cardParamCommand(CARD_CMD_NAND_ROM_MODE, 0, CARD_ACTIVATE | CARD_nRESET | CARD_CLK_SLOW | CARD_DELAY1(0x1FFF) | CARD_DELAY2(0x3F), NULL, 0);
nandRomMode = true; // nandRomMode = CARD_CMD_NAND_ROM_MODE;
} else if (src > ndsHeader->nandRwStart * 0x20000 /*dsi: 80000h?*/ && nandRomMode) { // } else if (src > ndsHeader->nandRwStart * 0x20000 /*dsi: 80000h?*/ && nandRomMode != CARD_CMD_NAND_RW_MODE) {
cardParamCommand(CARD_CMD_NAND_RW_MODE, 0, CARD_ACTIVATE | CARD_nRESET | CARD_CLK_SLOW | CARD_BLK_SIZE(7) | CARD_DELAY1(0x1FFF) | CARD_DELAY2(0x3F), NULL, 0); // cardParamCommand(CARD_CMD_NAND_RW_MODE, 0, CARD_ACTIVATE | CARD_nRESET | CARD_CLK_SLOW | CARD_DELAY1(0x1FFF) | CARD_DELAY2(0x3F), NULL, 0);
nandRomMode = false; // nandRomMode = CARD_CMD_NAND_RW_MODE;
} // }
} // }
cardParamCommand (CARD_CMD_DATA_READ, src, cardParamCommand (CARD_CMD_DATA_READ, src,
portFlags | CARD_ACTIVATE | CARD_nRESET | CARD_BLK_SIZE(1), portFlags | CARD_ACTIVATE | CARD_nRESET | CARD_BLK_SIZE(1),