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https://github.com/coderkei/akmenu-next.git
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135 lines
3.2 KiB
C
135 lines
3.2 KiB
C
// clang-format off
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/*
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This file is a part of libtwl (card.h)
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Copyright (C) 2023 Gericom
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SPDX-License-Identifier: Zlib
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*/
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#pragma once
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#define REG_MCCNT0 (*(vu16*)0x040001A0)
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#define REG_MCD0 (*(vu16*)0x040001A2)
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#define REG_MCCNT1 (*(vu32*)0x040001A4)
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#define REG_MCCMD0 (*(vu32*)0x040001A8)
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#define REG_MCCMD1 (*(vu32*)0x040001AC)
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#define REG_MCSCR0 (*(vu32*)0x040001B0)
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#define REG_MCSCR1 (*(vu32*)0x040001B4)
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#define REG_MCSCR2 (*(vu32*)0x040001B8)
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#define REG_MCD1 (*(vu32*)0x04100010)
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// REG_MCCNT0
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#define MCCNT0_SPI_RATE_4_19_MHZ 0
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#define MCCNT0_SPI_RATE_2_09_MHZ 1
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#define MCCNT0_SPI_RATE_1_05_MHZ 2
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#define MCCNT0_SPI_RATE_524_KHZ 3
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#define MCCNT0_SPI_HOLD_CS (1 << 6)
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#define MCCNT0_SPI_BUSY (1 << 7)
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#define MCCNT0_MODE_MASK (1 << 13)
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#define MCCNT0_MODE_ROM (0 << 13)
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#define MCCNT0_MODE_SPI (1 << 13)
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#define MCCNT0_ROM_XFER_IRQ (1 << 14)
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#define MCCNT0_ENABLE (1 << 15)
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// REG_MCCNT1
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#define MCCNT1_LATENCY1_SHIFT 0
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#define MCCNT1_LATENCY1_MASK 0x1FFF
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#define MCCNT1_LATENCY1(x) (x)
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#define MCCNT1_READ_DATA_DESCRAMBLE (1 << 13)
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#define MCCNT1_CLOCK_SCRAMBLER (1 << 14)
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#define MCCNT1_APPLY_SCRAMBLE_SEED (1 << 15)
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#define MCCNT1_LATENCY2_SHIFT 16
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#define MCCNT1_LATENCY2_MASK 0x3F0000
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#define MCCNT1_LATENCY2(x) (((x) << MCCNT1_LATENCY2_SHIFT) & MCCNT1_LATENCY2_MASK)
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#define MCCNT1_CMD_SCRAMBLE (1 << 22)
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#define MCCNT1_DATA_READY (1 << 23)
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#define MCCNT1_LEN_0 (0 << 24)
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#define MCCNT1_LEN_512 (1 << 24)
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#define MCCNT1_LEN_1024 (2 << 24)
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#define MCCNT1_LEN_2048 (3 << 24)
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#define MCCNT1_LEN_4096 (4 << 24)
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#define MCCNT1_LEN_8192 (5 << 24)
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#define MCCNT1_LEN_16384 (6 << 24)
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#define MCCNT1_LEN_4 (7 << 24)
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#define MCCNT1_CLK_6_7_MHZ (0 << 27)
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#define MCCNT1_CLK_4_2_MHZ (1 << 27)
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#define MCCNT1_LATENCY_CLK (1 << 28)
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#define MCCNT1_RESET_ON (0 << 29)
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#define MCCNT1_RESET_OFF (1 << 29)
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#define MCCNT1_DIR_READ (0 << 30)
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#define MCCNT1_DIR_WRITE (1 << 30)
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#define MCCNT1_ENABLE (1 << 31)
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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static inline void card_romSetCmd(u64 cmd)
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{
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*(vu64*)®_MCCMD0 = __builtin_bswap64(cmd);
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}
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static inline bool card_romIsDataReady(void)
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{
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return REG_MCCNT1 & MCCNT1_DATA_READY;
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}
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static inline void card_romWaitDataReady(void)
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{
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while(!card_romIsDataReady());
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}
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static inline u32 card_romGetData(void)
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{
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return REG_MCD1;
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}
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static inline void card_romSetData(u32 data)
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{
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REG_MCD1 = data;
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}
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static inline bool card_romIsBusy(void)
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{
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return REG_MCCNT1 & MCCNT1_ENABLE;
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}
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static inline void card_romWaitBusy(void)
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{
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while(card_romIsBusy());
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}
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static inline void card_romStartXfer(u32 settings, bool irq)
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{
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REG_MCCNT0 = (REG_MCCNT0 & ~(MCCNT0_MODE_MASK | MCCNT0_ROM_XFER_IRQ)) | MCCNT0_MODE_ROM | (irq ? MCCNT0_ROM_XFER_IRQ : 0) | MCCNT0_ENABLE;
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REG_MCCNT1 = MCCNT1_ENABLE | settings;
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}
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void card_romCpuRead(u32* dst, u32 len);
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void card_romCpuReadUnaligned(u8* dst, u32 words);
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void card_romCpuWrite(const u32* src, u32 words);
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void card_romCpuWriteUnaligned(const u8* src, u32 words);
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#ifdef __cplusplus
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}
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#endif
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