From 3aea58f4a9d99a2b20354bbbf3c3157541167d9a Mon Sep 17 00:00:00 2001
From: Zack Buhman <zack@buhman.org>
Date: Wed, 11 Sep 2024 08:58:05 -0500
Subject: [PATCH] arm9: use instruction TCM

---
 arm7/arm7.lds         | 10 +++++-----
 arm9/arm9.lds         | 34 +++++++++++++++++-----------------
 arm9/examples/ulala.c |  4 ++--
 arm9/start.s          | 29 +++++++++++++++++++++++++++--
 symbols.lds           |  3 ---
 5 files changed, 51 insertions(+), 29 deletions(-)

diff --git a/arm7/arm7.lds b/arm7/arm7.lds
index e123193..641be0d 100644
--- a/arm7/arm7.lds
+++ b/arm7/arm7.lds
@@ -15,32 +15,32 @@ SECTIONS
     *(.text)
     *(.text.*)
     . = ALIGN(32);
-  } >arm7_exclusive_internal_work_ram AT>main_memory
+  } > arm7_exclusive_internal_work_ram AT> main_memory
 
   .data ALIGN(4) :
   {
     *(.data)
     *(.data.*)
-  } >arm7_exclusive_internal_work_ram AT>main_memory
+  } > arm7_exclusive_internal_work_ram AT> main_memory
 
   .rodata ALIGN(4) :
   {
     *(.rodata)
     *(.rodata.*)
-  } >arm7_exclusive_internal_work_ram AT>main_memory
+  } > arm7_exclusive_internal_work_ram AT> main_memory
 
   .ctors ALIGN(4) :
   {
     KEEP(*(.ctors))
     KEEP(*(.ctors.*))
-  } >arm7_exclusive_internal_work_ram AT>main_memory
+  } > arm7_exclusive_internal_work_ram AT> main_memory
 
   .bss ALIGN(4) (NOLOAD) :
   {
     *(.bss)
     *(.bss.*)
     *(COMMON)
-  } >arm7_exclusive_internal_work_ram
+  } > arm7_exclusive_internal_work_ram
 
   /DISCARD/ :
   {
diff --git a/arm9/arm9.lds b/arm9/arm9.lds
index 918de4f..dea994b 100644
--- a/arm9/arm9.lds
+++ b/arm9/arm9.lds
@@ -2,47 +2,47 @@ OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
 OUTPUT_ARCH(arm)
 MEMORY
 {
-  ram : ORIGIN = 0x02000000, LENGTH = 4M
+  main_memory : ORIGIN = 0x02000000, LENGTH = 4M - 256K
+  arm9_instruction_tcm : ORIGIN = 0x01000000, LENGTH = 32K
+  arm9_data_tcm : ORIGIN = 0x027e0000, LENGTH = 16K
 }
 SECTIONS
 {
-  . = ORIGIN(ram);
+  . = ORIGIN(arm9_instruction_tcm);
 
   .text ALIGN(4) :
   {
     KEEP(*(.text.start))
     *(.text)
     *(.text.*)
-    *(.glue_7t)
-    *(.glue_7)
-    *(.vfp11_veneer)
-    *(.v4_bx)
-  } > ram
+    . = ALIGN(32);
+  } > arm9_instruction_tcm AT> main_memory
+
+  . = ORIGIN(main_memory) + SIZEOF(.text);
 
   .data ALIGN(4) :
   {
     *(.data)
     *(.data.*)
-  } > ram
+  } > main_memory
 
   .rodata ALIGN(4) :
   {
     *(.rodata)
     *(.rodata.*)
-  } > ram
-
-  .ctors ALIGN(4) :
-  {
-    KEEP(*(.ctors))
-    KEEP(*(.ctors.*))
-  } > ram
+  } > main_memory
 
   .bss ALIGN(4) (NOLOAD) :
   {
     *(.bss)
     *(.bss.*)
     *(COMMON)
-  } > ram
+  } > main_memory
+
+  /DISCARD/ :
+  {
+    *(.glue_7) *(.glue_7t) *(.vfp11_veneer) *(.v4_bx)
+  }
 
   INCLUDE "../debug.lds"
 }
@@ -50,4 +50,4 @@ SECTIONS
 INCLUDE "../symbols.lds"
 INCLUDE "addresses.lds"
 
-__stack_end = ORIGIN(ram) + LENGTH(ram) - 4;
+__stack_end = ORIGIN(main_memory) + LENGTH(main_memory) - 4;
diff --git a/arm9/examples/ulala.c b/arm9/examples/ulala.c
index f221fef..2b11f66 100644
--- a/arm9/examples/ulala.c
+++ b/arm9/examples/ulala.c
@@ -287,8 +287,8 @@ void main()
     io_registers.a.MTX_IDENTITY = 0;
 
     io_registers.a.MTX_TRANS = 0;
-    io_registers.a.MTX_TRANS = (int)(-0.7 * (float)(1 << 12));
-    io_registers.a.MTX_TRANS = (int)(-0.1 * (float)(1 << 12));
+    io_registers.a.MTX_TRANS = (int)(-1.0 * (float)(1 << 12));
+    io_registers.a.MTX_TRANS = (int)(0.15 * (float)(1 << 12));
 
 
     // multiply by a y-axis rotation
diff --git a/arm9/start.s b/arm9/start.s
index a534ca5..264d7a6 100644
--- a/arm9/start.s
+++ b/arm9/start.s
@@ -1,4 +1,17 @@
-        .macro FILL_ZERO_32_BYTE_ALIGNED
+	/* DDI0201D_arm946es_r1p1_trm.pdf pdf page 40 ; printed page 2-12 */
+	.set INSTRUCTION_TCM_LOAD_MODE, (1 << 19)
+	.set INSTRUCTION_TCM_ENABLE, (1 << 18)
+	.set DATA_TCM_LOAD_MODE, (1 << 17)
+	.set DATA_TCM_ENABLE, (1 << 16)
+	.set DISABLE_LOADING_TBIT, (1 << 15)
+	.set ROUND_ROBIN_REPLACEMENT, (1 << 14)
+	.set ALTERNATE_VECTOR_SELET, (1 << 13)
+	.set INSTRUCTION_CACHE_ENABLE, (1 << 12)
+	.set BIG_ENDIAN, (1 << 7)
+	.set DATA_CACHE_ENABLE, (1 << 2)
+	.set PROTECTION_UNIT_ENABLE, (1 << 0)
+
+	.macro FILL_ZERO_32_BYTE_ALIGNED
         cmp r1, r10
         beq _fill_break.\@
         .irp i, 2, 3, 4, 5, 6, 7, 8, 9
@@ -25,13 +38,25 @@ _fill_break.\@:
         .section .text.start
         .global _start
 _start:
-	/*
+	// https://developer.arm.com/documentation/ddi0338/g/system-control-coprocessor/system-control-processor-registers/c9--data-tcm-region-register?lang=en
+
+	// set data tcm address
+	ldr r0, =0x027e0000
+	mcr p15, 0, r0, c9, c1, 0
+
+	// enable instruction and data TCM
+        mrc p15, 0, r0, c1, c0, 0
+        ldr r1, =INSTRUCTION_TCM_ENABLE | DATA_TCM_ENABLE | INSTRUCTION_CACHE_ENABLE | DATA_CACHE_ENABLE
+        orr r0, r0, r1
+        mcr p15, 0, r0, c1, c0, 0
+
 _link_text:
         ldr r0, =__text_load_start
         ldr r1, =__text_link_start
         ldr r10, =__text_link_end
         COPY_32_BYTE_ALIGNED
 
+	/*
 _link_data:
         ldr r0, =__data_load_start
         ldr r1, =__data_link_start
diff --git a/symbols.lds b/symbols.lds
index 045c871..7e3a24a 100644
--- a/symbols.lds
+++ b/symbols.lds
@@ -10,8 +10,5 @@ __rodata_link_start = ADDR(.rodata);
 __rodata_link_end = ADDR(.rodata) + SIZEOF(.rodata);
 __rodata_load_start = LOADADDR(.rodata);
 
-__ctors_link_start = ADDR(.ctors);
-__ctors_link_end = ADDR(.ctors) + SIZEOF(.ctors);
-
 __bss_link_start = ADDR(.bss);
 __bss_link_end = ADDR(.bss) + SIZEOF(.bss);