Francis Visoiu Mistrih e85b06d65f [CodeGen] Use MIR syntax for MachineMemOperand printing ... Get rid of the "; mem:" suffix and use the one we use in MIR: ":: (load 2)". rdar://38163529 Differential Revision: https://reviews.llvm.org/D42377 llvm-svn: 327580		2018-03-14 21:52:13 +00:00
..
AArch64	[CodeGen] Use MIR syntax for MachineMemOperand printing	2018-03-14 21:52:13 +00:00
AMDGPU	[CodeGen] Use MIR syntax for MachineMemOperand printing	2018-03-14 21:52:13 +00:00
ARC
ARM	[CodeGen] Use MIR syntax for MachineMemOperand printing	2018-03-14 21:52:13 +00:00
AVR	[AVR] Remove the earlyclobber flag from LDDWRdYQ	2018-03-06 11:20:25 +00:00
BPF	bpf: Extends zero extension elimination beyond comparison instructions	2018-03-13 06:47:03 +00:00
Generic	Revert "Reapply "[DWARFv5] Emit file 0 to the line table.""	2018-03-07 16:27:44 +00:00
Hexagon	[CodeGen] Use MIR syntax for MachineMemOperand printing	2018-03-14 21:52:13 +00:00
Inputs
Lanai
Mips	[mips] Fix the definitions of the EVA instructions	2018-03-13 14:39:44 +00:00
MIR	[MIR] Allow frame-setup and frame-destroy on the same instruction	2018-03-13 19:53:16 +00:00
MSP430
Nios2
NVPTX	[DAGCombiner] When combining zero_extend of a truncate, only mask before extending for vectors.	2018-03-01 22:32:25 +00:00
PowerPC	[CodeGen] Use MIR syntax for MachineMemOperand printing	2018-03-14 21:52:13 +00:00
RISCV	[RISCV] Update two tests after r326208	2018-02-28 08:20:47 +00:00
SPARC	Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"	2018-02-27 16:59:10 +00:00
SystemZ	[CodeGenPrepare] Respect endianness in splitMergedValStore.	2018-03-13 08:36:20 +00:00
Thumb	[ARM] Fix access to stack arguments when re-aligning SP in Armv6m	2018-03-02 15:47:14 +00:00
Thumb2	ARM: Don't rewrite add reg, $sp, 0 -> mov reg, $sp if the add defines CPSR.	2018-02-27 19:00:59 +00:00
WebAssembly
WinCFGuard
WinEH
X86	[CodeGen] Use MIR syntax for MachineMemOperand printing	2018-03-14 21:52:13 +00:00
XCore	[XCore] Return true in enableMultipleCopyHints().	2018-02-26 08:03:32 +00:00