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b4278895a4
As reported on http://lists.llvm.org/pipermail/cfe-dev/2018-August/058760.html, this broke i386-freebsd11 due to its lack of atomic 64 bit primitives. While that's not really this commit's fault, let's revert back to the old behaviour until this can be fixed. This means generating cmpxchg8b etc for i386 and i486 which don't technically support those, but that's been the behaviour for a long time, so a little longer probably doesn't hurt that much. > Adjust MaxAtomicInlineWidth for i386/i486 targets. > > This is to fix the bug reported in https://bugs.llvm.org/show_bug.cgi?id=34347#c6. > Currently, all MaxAtomicInlineWidth of x86-32 targets are set to 64. However, > i386 doesn't support any cmpxchg related instructions. i486 only supports cmpxchg. > So in this patch MaxAtomicInlineWidth is reset as follows: > For i386, the MaxAtomicInlineWidth should be 0 because no cmpxchg is supported. > For i486, the MaxAtomicInlineWidth should be 32 because it supports cmpxchg. > For others 32 bits x86 cpu, the MaxAtomicInlineWidth should be 64 because of cmpxchg8b. > > Differential Revision: https://reviews.llvm.org/D42154 llvm-svn: 340666
70 lines
1.7 KiB
C++
70 lines
1.7 KiB
C++
// RUN: %clang_cc1 %s -std=c++11 -emit-llvm -o - -triple=x86_64-linux-gnu | FileCheck %s
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// RUN: %clang_cc1 %s -std=c++11 -emit-llvm -o - -triple=x86_64-linux-gnu -target-cpu core2 | FileCheck %s --check-prefix=CORE2
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// Check the atomic code generation for cpu targets w/wo cx16 support.
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struct alignas(8) AM8 {
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int f1, f2;
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};
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AM8 m8;
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AM8 load8() {
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AM8 am;
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// CHECK-LABEL: @_Z5load8v
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// CHECK: load atomic i64, {{.*}} monotonic
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// CORE2-LABEL: @_Z5load8v
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// CORE2: load atomic i64, {{.*}} monotonic
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__atomic_load(&m8, &am, 0);
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return am;
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}
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AM8 s8;
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void store8() {
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// CHECK-LABEL: @_Z6store8v
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// CHECK: store atomic i64 {{.*}} monotonic
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// CORE2-LABEL: @_Z6store8v
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// CORE2: store atomic i64 {{.*}} monotonic
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__atomic_store(&m8, &s8, 0);
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}
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bool cmpxchg8() {
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AM8 am;
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// CHECK-LABEL: @_Z8cmpxchg8v
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// CHECK: cmpxchg i64* {{.*}} monotonic
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// CORE2-LABEL: @_Z8cmpxchg8v
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// CORE2: cmpxchg i64* {{.*}} monotonic
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return __atomic_compare_exchange(&m8, &s8, &am, 0, 0, 0);
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}
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struct alignas(16) AM16 {
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long f1, f2;
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};
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AM16 m16;
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AM16 load16() {
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AM16 am;
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// CHECK-LABEL: @_Z6load16v
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// CHECK: call void @__atomic_load
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// CORE2-LABEL: @_Z6load16v
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// CORE2: load atomic i128, {{.*}} monotonic
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__atomic_load(&m16, &am, 0);
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return am;
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}
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AM16 s16;
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void store16() {
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// CHECK-LABEL: @_Z7store16v
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// CHECK: call void @__atomic_store
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// CORE2-LABEL: @_Z7store16v
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// CORE2: store atomic i128 {{.*}} monotonic
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__atomic_store(&m16, &s16, 0);
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}
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bool cmpxchg16() {
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AM16 am;
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// CHECK-LABEL: @_Z9cmpxchg16v
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// CHECK: call zeroext i1 @__atomic_compare_exchange
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// CORE2-LABEL: @_Z9cmpxchg16v
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// CORE2: cmpxchg i128* {{.*}} monotonic
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return __atomic_compare_exchange(&m16, &s16, &am, 0, 0, 0);
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}
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