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b276dd195a
In PR41304: https://bugs.llvm.org/show_bug.cgi?id=41304 ...we have a case where we want to fold a binop of select-shuffle (blended) values. Rather than try to match commuted variants of the pattern, we can canonicalize the shuffles and check for mask equality with commuted operands. We don't produce arbitrary shuffle masks in instcombine, but select-shuffles are a special case that the backend is required to handle because we already canonicalize vector select to this shuffle form. So there should be no codegen difference from this change. It's possible that this improves CSE in IR though. Differential Revision: https://reviews.llvm.org/D60016 llvm-svn: 357366
70 lines
2.2 KiB
C
70 lines
2.2 KiB
C
// RUN: %clang_cc1 -ffreestanding %s -O3 -triple=x86_64-apple-darwin -target-feature +avx -emit-llvm -o - | FileCheck %s
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// FIXME: The shufflevector instructions in test_cmpgt_sd are relying on O3 here.
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#include <immintrin.h>
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//
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// Test LLVM IR codegen of cmpXY instructions
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//
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__m128d test_cmp_sd(__m128d a, __m128d b) {
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// Expects that the third argument in LLVM IR is immediate expression
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// CHECK: @llvm.x86.sse2.cmp.sd({{.*}}, i8 13)
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return _mm_cmp_sd(a, b, _CMP_GE_OS);
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}
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__m128d test_cmp_ss(__m128 a, __m128 b) {
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// Expects that the third argument in LLVM IR is immediate expression
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// CHECK: @llvm.x86.sse.cmp.ss({{.*}}, i8 13)
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return _mm_cmp_ss(a, b, _CMP_GE_OS);
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}
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__m128 test_cmpgt_ss(__m128 a, __m128 b) {
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// CHECK: @llvm.x86.sse.cmp.ss({{.*}}, i8 1)
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// CHECK: shufflevector <{{.*}}, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
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return _mm_cmpgt_ss(a, b);
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}
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__m128 test_cmpge_ss(__m128 a, __m128 b) {
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// CHECK: @llvm.x86.sse.cmp.ss({{.*}}, i8 2)
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// CHECK: shufflevector <{{.*}}, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
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return _mm_cmpge_ss(a, b);
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}
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__m128 test_cmpngt_ss(__m128 a, __m128 b) {
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// CHECK: @llvm.x86.sse.cmp.ss({{.*}}, i8 5)
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// CHECK: shufflevector <{{.*}}, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
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return _mm_cmpngt_ss(a, b);
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}
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__m128 test_cmpnge_ss(__m128 a, __m128 b) {
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// CHECK: @llvm.x86.sse.cmp.ss({{.*}}, i8 6)
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// CHECK: shufflevector <{{.*}}, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
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return _mm_cmpnge_ss(a, b);
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}
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__m128d test_cmpgt_sd(__m128d a, __m128d b) {
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// CHECK: @llvm.x86.sse2.cmp.sd({{.*}}, i8 1)
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// CHECK: shufflevector <{{.*}}, <2 x i32> <i32 0, i32 3>
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return _mm_cmpgt_sd(a, b);
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}
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__m128d test_cmpge_sd(__m128d a, __m128d b) {
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// CHECK: @llvm.x86.sse2.cmp.sd({{.*}}, i8 2)
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// CHECK: shufflevector <{{.*}}, <2 x i32> <i32 0, i32 3>
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return _mm_cmpge_sd(a, b);
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}
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__m128d test_cmpngt_sd(__m128d a, __m128d b) {
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// CHECK: @llvm.x86.sse2.cmp.sd({{.*}}, i8 5)
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// CHECK: shufflevector <{{.*}}, <2 x i32> <i32 0, i32 3>
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return _mm_cmpngt_sd(a, b);
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}
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__m128d test_cmpnge_sd(__m128d a, __m128d b) {
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// CHECK: @llvm.x86.sse2.cmp.sd({{.*}}, i8 6)
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// CHECK: shufflevector <{{.*}}, <2 x i32> <i32 0, i32 3>
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return _mm_cmpnge_sd(a, b);
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}
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