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https://github.com/Gericom/teak-llvm.git
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c46827c7ed
LLVM IR recently added a Type parameter to the byval Attribute, so that when pointers become opaque and no longer have an element type the information will still be present in IR. For now the Type parameter is optional (which is why Clang didn't need this change at the time), but it will become mandatory soon. llvm-svn: 362652
142 lines
3.8 KiB
C++
142 lines
3.8 KiB
C++
// REQUIRES: arm-registered-target
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// RUN: %clang_cc1 -triple arm-none-none-eabi \
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// RUN: -O2 \
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// RUN: -target-cpu cortex-a8 \
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// RUN: -emit-llvm -o - %s | FileCheck %s
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extern "C" {
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// Base case, nothing interesting.
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struct S {
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int x, y;
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};
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void f0(int, S);
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void f0m(int, int, int, int, int, S);
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void g0() {
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S s = {6, 7};
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f0(1, s);
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f0m(1, 2, 3, 4, 5, s);
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}
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// CHECK: define void @g0
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// CHECK: call void @f0(i32 1, [2 x i32] [i32 6, i32 7]
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// CHECK: call void @f0m(i32 1, i32 2, i32 3, i32 4, i32 5, [2 x i32] [i32 6, i32 7]
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// CHECK: declare void @f0(i32, [2 x i32])
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// CHECK: declare void @f0m(i32, i32, i32, i32, i32, [2 x i32])
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// Aligned struct, passed according to its natural alignment.
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struct __attribute__((aligned(8))) S8 {
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int x, y;
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} s8;
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void f1(int, S8);
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void f1m(int, int, int, int, int, S8);
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void g1() {
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S8 s = {6, 7};
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f1(1, s);
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f1m(1, 2, 3, 4, 5, s);
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}
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// CHECK: define void @g1
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// CHECK: call void @f1(i32 1, [2 x i32] [i32 6, i32 7]
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// CHECK: call void @f1m(i32 1, i32 2, i32 3, i32 4, i32 5, [2 x i32] [i32 6, i32 7]
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// CHECK: declare void @f1(i32, [2 x i32])
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// CHECK: declare void @f1m(i32, i32, i32, i32, i32, [2 x i32])
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// Aligned struct, passed according to its natural alignment.
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struct alignas(16) S16 {
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int x, y;
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};
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extern "C" void f2(int, S16);
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extern "C" void f2m(int, int, int, int, int, S16);
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void g2() {
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S16 s = {6, 7};
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f2(1, s);
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f2m(1, 2, 3, 4, 5, s);
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}
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// CHECK: define void @g2
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// CHECK: call void @f2(i32 1, [4 x i32] [i32 6, i32 7
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// CHECK: call void @f2m(i32 1, i32 2, i32 3, i32 4, i32 5, [4 x i32] [i32 6, i32 7
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// CHECK: declare void @f2(i32, [4 x i32])
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// CHECK: declare void @f2m(i32, i32, i32, i32, i32, [4 x i32])
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// Increased natural alignment.
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struct SF8 {
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int x __attribute__((aligned(8)));
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int y;
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};
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void f3(int, SF8);
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void f3m(int, int, int, int, int, SF8);
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void g3() {
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SF8 s = {6, 7};
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f3(1, s);
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f3m(1, 2, 3, 4, 5, s);
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}
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// CHECK: define void @g3
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// CHECK: call void @f3(i32 1, [1 x i64] [i64 30064771078]
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// CHECK: call void @f3m(i32 1, i32 2, i32 3, i32 4, i32 5, [1 x i64] [i64 30064771078]
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// CHECK: declare void @f3(i32, [1 x i64])
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// CHECK: declare void @f3m(i32, i32, i32, i32, i32, [1 x i64])
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// Increased natural alignment, capped to 8 though.
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struct SF16 {
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int x;
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int y alignas(16);
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int z, a, b, c, d, e, f, g, h, i, j, k;
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};
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void f4(int, SF16);
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void f4m(int, int, int, int, int, SF16);
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void g4() {
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SF16 s = {6, 7};
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f4(1, s);
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f4m(1, 2, 3, 4, 5, s);
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}
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// CHECK: define void @g4
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// CHECK: call void @f4(i32 1, %struct.SF16* nonnull byval(%struct.SF16) align 8
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// CHECK: call void @f4m(i32 1, i32 2, i32 3, i32 4, i32 5, %struct.SF16* nonnull byval(%struct.SF16) align 8
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// CHECK: declare void @f4(i32, %struct.SF16* byval(%struct.SF16) align 8)
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// CHECK: declare void @f4m(i32, i32, i32, i32, i32, %struct.SF16* byval(%struct.SF16) align 8)
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// Packed structure.
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struct __attribute__((packed)) P {
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int x;
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long long u;
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};
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void f5(int, P);
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void f5m(int, int, int, int, int, P);
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void g5() {
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P s = {6, 7};
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f5(1, s);
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f5m(1, 2, 3, 4, 5, s);
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}
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// CHECK: define void @g5
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// CHECK: call void @f5(i32 1, [3 x i32] [i32 6, i32 7, i32 0])
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// CHECK: call void @f5m(i32 1, i32 2, i32 3, i32 4, i32 5, [3 x i32] [i32 6, i32 7, i32 0])
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// CHECK: declare void @f5(i32, [3 x i32])
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// CHECK: declare void @f5m(i32, i32, i32, i32, i32, [3 x i32])
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// Packed and aligned, alignement causes padding at the end.
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struct __attribute__((packed, aligned(8))) P8 {
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int x;
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long long u;
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};
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void f6(int, P8);
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void f6m(int, int, int, int, int, P8);
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void g6() {
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P8 s = {6, 7};
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f6(1, s);
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f6m(1, 2, 3, 4, 5, s);
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}
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// CHECK: define void @g6
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// CHECK: call void @f6(i32 1, [4 x i32] [i32 6, i32 7, i32 0, i32 0])
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// CHECK: call void @f6m(i32 1, i32 2, i32 3, i32 4, i32 5, [4 x i32] [i32 6, i32 7, i32 0, i32 0])
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// CHECK: declare void @f6(i32, [4 x i32])
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// CHECK: declare void @f6m(i32, i32, i32, i32, i32, [4 x i32])
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}
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