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The most complex aspect of the convention is the handling of homogeneous vector and floating point aggregates. Reuse the homogeneous aggregate classification code that we use on PPC64 and ARM for this. This convention also has a C mangling, and we apparently implement that in both Clang and LLVM. Reviewed By: majnemer Differential Revision: http://reviews.llvm.org/D6063 llvm-svn: 221006
78 lines
4.6 KiB
C
78 lines
4.6 KiB
C
// RUN: %clang_cc1 -emit-llvm %s -o - -triple=i386-pc-win32 | FileCheck %s
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// RUN: %clang_cc1 -emit-llvm %s -o - -triple=x86_64-pc-win32 | FileCheck %s --check-prefix=X64
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void __vectorcall v1(int a, int b) {}
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// CHECK: define x86_vectorcallcc void @"\01v1@@8"(i32 inreg %a, i32 inreg %b)
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// X64: define x86_vectorcallcc void @"\01v1@@16"(i32 %a, i32 %b)
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void __vectorcall v2(char a, char b) {}
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// CHECK: define x86_vectorcallcc void @"\01v2@@8"(i8 inreg signext %a, i8 inreg signext %b)
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// X64: define x86_vectorcallcc void @"\01v2@@16"(i8 %a, i8 %b)
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struct Small { int a; };
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void __vectorcall v3(int a, struct Small b, int c) {}
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// CHECK: define x86_vectorcallcc void @"\01v3@@12"(i32 inreg %a, %struct.Small* byval align 4 %b, i32 inreg %c)
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// X64: define x86_vectorcallcc void @"\01v3@@24"(i32 %a, i32 %b.coerce, i32 %c)
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struct Large { int a[5]; };
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void __vectorcall v4(int a, struct Large b, int c) {}
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// CHECK: define x86_vectorcallcc void @"\01v4@@28"(i32 inreg %a, %struct.Large* byval align 4 %b, i32 inreg %c)
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// X64: define x86_vectorcallcc void @"\01v4@@40"(i32 %a, %struct.Large* %b, i32 %c)
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struct HFA2 { double x, y; };
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struct HFA4 { double w, x, y, z; };
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struct HFA5 { double v, w, x, y, z; };
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void __vectorcall hfa1(int a, struct HFA4 b, int c) {}
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// CHECK: define x86_vectorcallcc void @"\01hfa1@@40"(i32 inreg %a, double %b.0, double %b.1, double %b.2, double %b.3, i32 inreg %c)
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// X64: define x86_vectorcallcc void @"\01hfa1@@48"(i32 %a, double %b.0, double %b.1, double %b.2, double %b.3, i32 %c)
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// HFAs that would require more than six total SSE registers are passed
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// indirectly. Additional vector arguments can consume the rest of the SSE
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// registers.
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void __vectorcall hfa2(struct HFA4 a, struct HFA4 b, double c) {}
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// CHECK: define x86_vectorcallcc void @"\01hfa2@@72"(double %a.0, double %a.1, double %a.2, double %a.3, %struct.HFA4* inreg %b, double %c)
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// X64: define x86_vectorcallcc void @"\01hfa2@@72"(double %a.0, double %a.1, double %a.2, double %a.3, %struct.HFA4* align 8 %b, double %c)
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// Ensure that we pass builtin types directly while counting them against the
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// SSE register usage.
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void __vectorcall hfa3(double a, double b, double c, double d, double e, struct HFA2 f) {}
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// CHECK: define x86_vectorcallcc void @"\01hfa3@@56"(double %a, double %b, double %c, double %d, double %e, %struct.HFA2* inreg %f)
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// X64: define x86_vectorcallcc void @"\01hfa3@@56"(double %a, double %b, double %c, double %d, double %e, %struct.HFA2* align 8 %f)
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// Aggregates with more than four elements are not HFAs and are passed byval.
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// Because they are not classified as homogeneous, they don't get special
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// handling to ensure alignment.
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void __vectorcall hfa4(struct HFA5 a) {}
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// CHECK: define x86_vectorcallcc void @"\01hfa4@@40"(%struct.HFA5* byval align 4)
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// X64: define x86_vectorcallcc void @"\01hfa4@@40"(%struct.HFA5* %a)
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// Return HFAs of 4 or fewer elements in registers.
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static struct HFA2 g_hfa2;
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struct HFA2 __vectorcall hfa5(void) { return g_hfa2; }
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// CHECK: define x86_vectorcallcc %struct.HFA2 @"\01hfa5@@0"()
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// X64: define x86_vectorcallcc %struct.HFA2 @"\01hfa5@@0"()
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typedef float __attribute__((vector_size(16))) v4f32;
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struct HVA2 { v4f32 x, y; };
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struct HVA4 { v4f32 w, x, y, z; };
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void __vectorcall hva1(int a, struct HVA4 b, int c) {}
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// CHECK: define x86_vectorcallcc void @"\01hva1@@72"(i32 inreg %a, <4 x float> %b.0, <4 x float> %b.1, <4 x float> %b.2, <4 x float> %b.3, i32 inreg %c)
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// X64: define x86_vectorcallcc void @"\01hva1@@80"(i32 %a, <4 x float> %b.0, <4 x float> %b.1, <4 x float> %b.2, <4 x float> %b.3, i32 %c)
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void __vectorcall hva2(struct HVA4 a, struct HVA4 b, v4f32 c) {}
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// CHECK: define x86_vectorcallcc void @"\01hva2@@144"(<4 x float> %a.0, <4 x float> %a.1, <4 x float> %a.2, <4 x float> %a.3, %struct.HVA4* inreg %b, <4 x float> %c)
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// X64: define x86_vectorcallcc void @"\01hva2@@144"(<4 x float> %a.0, <4 x float> %a.1, <4 x float> %a.2, <4 x float> %a.3, %struct.HVA4* align 16 %b, <4 x float> %c)
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void __vectorcall hva3(v4f32 a, v4f32 b, v4f32 c, v4f32 d, v4f32 e, struct HVA2 f) {}
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// CHECK: define x86_vectorcallcc void @"\01hva3@@112"(<4 x float> %a, <4 x float> %b, <4 x float> %c, <4 x float> %d, <4 x float> %e, %struct.HVA2* inreg %f)
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// X64: define x86_vectorcallcc void @"\01hva3@@112"(<4 x float> %a, <4 x float> %b, <4 x float> %c, <4 x float> %d, <4 x float> %e, %struct.HVA2* align 16 %f)
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typedef float __attribute__((ext_vector_type(3))) v3f32;
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struct OddSizeHVA { v3f32 x, y; };
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void __vectorcall odd_size_hva(struct OddSizeHVA a) {}
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// CHECK: define x86_vectorcallcc void @"\01odd_size_hva@@32"(<3 x float> %a.0, <3 x float> %a.1)
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// X64: define x86_vectorcallcc void @"\01odd_size_hva@@32"(<3 x float> %a.0, <3 x float> %a.1)
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