teak-llvm/clang/test/CodeGen/mips-inline-asm-modifiers.c
Toma Tabacu 9941195a9f [mips] Always clobber $1 for MIPS inline asm.
Summary:
Because GCC doesn't use $1 for code generation, inline assembly code can use $1 without having to add it to the clobbers list.

LLVM, on the other hand, does not shy away from using $1, and this can cause conflicts with inline assembly which assumes GCC-like code generation.

A solution to this problem is to make Clang automatically clobber $1 for all MIPS inline assembly.
This is not the optimal solution, but it seems like a necessary compromise, for now.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: cfe-commits

Differential Revision: http://reviews.llvm.org/D6638

llvm-svn: 224428
2014-12-17 12:02:58 +00:00

43 lines
1.1 KiB
C

// RUN: %clang -target mipsel-unknown-linux -S -o - -emit-llvm %s \
// RUN: | FileCheck %s
// This checks that the frontend will accept inline asm operand modifiers
int printf(const char*, ...);
typedef int v4i32 __attribute__((vector_size(16)));
// CHECK: %{{[0-9]+}} = call i32 asm ".set noreorder;\0Alw $0,$1;\0A.set reorder;\0A", "=r,*m,~{$1}"(i32* getelementptr inbounds ([8 x i32]* @b, i32 {{[0-9]+}}, i32 {{[0-9]+}})) #2,
// CHECK: %{{[0-9]+}} = call i32 asm "lw $0,${1:D};\0A", "=r,*m,~{$1}"(i32* getelementptr inbounds ([8 x i32]* @b, i32 {{[0-9]+}}, i32 {{[0-9]+}})) #2,
// CHECK: %{{[0-9]+}} = call <4 x i32> asm "ldi.w ${0:w},1", "=f,~{$1}"
int b[8] = {0,1,2,3,4,5,6,7};
int main()
{
int i;
v4i32 v4i32_r;
// The first word. Notice, no 'D'
{asm (
".set noreorder;\n"
"lw %0,%1;\n"
".set reorder;\n"
: "=r" (i)
: "m" (*(b+4)));}
printf("%d\n",i);
// The second word
{asm (
"lw %0,%D1;\n"
: "=r" (i)
: "m" (*(b+4))
);}
// MSA registers
{asm ("ldi.w %w0,1" : "=f" (v4i32_r));}
printf("%d\n",i);
return 1;
}