mirror of
https://github.com/Gericom/teak-llvm.git
synced 2025-06-28 15:58:57 -04:00
560cc4fb44
use clang -cc1 matching the front end and backend. Fix up a couple of tests that were testing aapcs for arm-linux-gnu. The test that removes the aapcs abi calling convention removes them because the default triple matches what the backend uses for the calling convention there and so it doesn't need to be explicitly stated - see the code in TargetInfo.cpp. llvm-svn: 224491
94 lines
5.2 KiB
C
94 lines
5.2 KiB
C
// RUN: %clang_cc1 -triple arm-linux-gnueabi -emit-llvm %s -o - | FileCheck %s -check-prefix=ARM
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// RUN: %clang_cc1 -triple powerpc-linux-gnu -emit-llvm %s -o - | FileCheck %s -check-prefix=PPC32
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// RUN: %clang_cc1 -triple powerpc64-linux-gnu -emit-llvm %s -o - | FileCheck %s -check-prefix=PPC64
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// RUN: %clang_cc1 -triple mipsel-linux-gnu -emit-llvm %s -o - | FileCheck %s -check-prefix=MIPS32
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// RUN: %clang_cc1 -triple mips64el-linux-gnu -emit-llvm %s -o - | FileCheck %s -check-prefix=MIPS64
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unsigned char c1, c2;
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unsigned short s1, s2;
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unsigned int i1, i2;
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unsigned long long ll1, ll2;
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unsigned char a1[100], a2[100];
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enum memory_order {
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memory_order_relaxed,
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memory_order_consume,
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memory_order_acquire,
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memory_order_release,
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memory_order_acq_rel,
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memory_order_seq_cst
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};
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void test1(void) {
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(void)__atomic_load(&c1, &c2, memory_order_seq_cst);
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(void)__atomic_store(&c1, &c2, memory_order_seq_cst);
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(void)__atomic_load(&s1, &s2, memory_order_seq_cst);
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(void)__atomic_store(&s1, &s2, memory_order_seq_cst);
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(void)__atomic_load(&i1, &i2, memory_order_seq_cst);
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(void)__atomic_store(&i1, &i2, memory_order_seq_cst);
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(void)__atomic_load(&ll1, &ll2, memory_order_seq_cst);
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(void)__atomic_store(&ll1, &ll2, memory_order_seq_cst);
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(void)__atomic_load(&a1, &a2, memory_order_seq_cst);
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(void)__atomic_store(&a1, &a2, memory_order_seq_cst);
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// ARM-LABEL: define{{.*}} void @test1
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// ARM: = call{{.*}} zeroext i8 @__atomic_load_1(i8* @c1
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// ARM: call{{.*}} void @__atomic_store_1(i8* @c1, i8 zeroext
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// ARM: = call{{.*}} zeroext i16 @__atomic_load_2(i8* bitcast (i16* @s1 to i8*)
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// ARM: call{{.*}} void @__atomic_store_2(i8* bitcast (i16* @s1 to i8*), i16 zeroext
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// ARM: = call{{.*}} i32 @__atomic_load_4(i8* bitcast (i32* @i1 to i8*)
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// ARM: call{{.*}} void @__atomic_store_4(i8* bitcast (i32* @i1 to i8*), i32
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// ARM: = call{{.*}} i64 @__atomic_load_8(i8* bitcast (i64* @ll1 to i8*)
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// ARM: call{{.*}} void @__atomic_store_8(i8* bitcast (i64* @ll1 to i8*), i64
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// ARM: call{{.*}} void @__atomic_load(i32 100, i8* getelementptr inbounds ([100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8]* @a2, i32 0, i32 0)
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// ARM: call{{.*}} void @__atomic_store(i32 100, i8* getelementptr inbounds ([100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8]* @a2, i32 0, i32 0)
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// PPC32-LABEL: define void @test1
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// PPC32: = load atomic i8* @c1 seq_cst
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// PPC32: store atomic i8 {{.*}}, i8* @c1 seq_cst
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// PPC32: = load atomic i16* @s1 seq_cst
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// PPC32: store atomic i16 {{.*}}, i16* @s1 seq_cst
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// PPC32: = load atomic i32* @i1 seq_cst
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// PPC32: store atomic i32 {{.*}}, i32* @i1 seq_cst
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// PPC32: = call i64 @__atomic_load_8(i8* bitcast (i64* @ll1 to i8*)
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// PPC32: call void @__atomic_store_8(i8* bitcast (i64* @ll1 to i8*), i64
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// PPC32: call void @__atomic_load(i32 100, i8* getelementptr inbounds ([100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8]* @a2, i32 0, i32 0)
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// PPC32: call void @__atomic_store(i32 100, i8* getelementptr inbounds ([100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8]* @a2, i32 0, i32 0)
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// PPC64-LABEL: define void @test1
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// PPC64: = load atomic i8* @c1 seq_cst
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// PPC64: store atomic i8 {{.*}}, i8* @c1 seq_cst
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// PPC64: = load atomic i16* @s1 seq_cst
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// PPC64: store atomic i16 {{.*}}, i16* @s1 seq_cst
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// PPC64: = load atomic i32* @i1 seq_cst
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// PPC64: store atomic i32 {{.*}}, i32* @i1 seq_cst
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// PPC64: = load atomic i64* @ll1 seq_cst
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// PPC64: store atomic i64 {{.*}}, i64* @ll1 seq_cst
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// PPC64: call void @__atomic_load(i64 100, i8* getelementptr inbounds ([100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8]* @a2, i32 0, i32 0)
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// PPC64: call void @__atomic_store(i64 100, i8* getelementptr inbounds ([100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8]* @a2, i32 0, i32 0)
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// MIPS32-LABEL: define void @test1
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// MIPS32: = load atomic i8* @c1 seq_cst
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// MIPS32: store atomic i8 {{.*}}, i8* @c1 seq_cst
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// MIPS32: = load atomic i16* @s1 seq_cst
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// MIPS32: store atomic i16 {{.*}}, i16* @s1 seq_cst
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// MIPS32: = load atomic i32* @i1 seq_cst
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// MIPS32: store atomic i32 {{.*}}, i32* @i1 seq_cst
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// MIPS32: call i64 @__atomic_load_8(i8* bitcast (i64* @ll1 to i8*)
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// MIPS32: call void @__atomic_store_8(i8* bitcast (i64* @ll1 to i8*), i64
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// MIPS32: call void @__atomic_load(i32 zeroext 100, i8* getelementptr inbounds ([100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8]* @a2, i32 0, i32 0)
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// MIPS32: call void @__atomic_store(i32 zeroext 100, i8* getelementptr inbounds ([100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8]* @a2, i32 0, i32 0)
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// MIPS64-LABEL: define void @test1
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// MIPS64: = load atomic i8* @c1 seq_cst
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// MIPS64: store atomic i8 {{.*}}, i8* @c1 seq_cst
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// MIPS64: = load atomic i16* @s1 seq_cst
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// MIPS64: store atomic i16 {{.*}}, i16* @s1 seq_cst
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// MIPS64: = load atomic i32* @i1 seq_cst
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// MIPS64: store atomic i32 {{.*}}, i32* @i1 seq_cst
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// MIPS64: = load atomic i64* @ll1 seq_cst
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// MIPS64: store atomic i64 {{.*}}, i64* @ll1 seq_cst
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// MIPS64: call void @__atomic_load(i64 zeroext 100, i8* getelementptr inbounds ([100 x i8]* @a1, i32 0, i32 0)
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// MIPS64: call void @__atomic_store(i64 zeroext 100, i8* getelementptr inbounds ([100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8]* @a2, i32 0, i32 0)
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}
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