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https://github.com/Gericom/teak-llvm.git
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97ed076dd1
Field ResourceUnitMask was incorrectly defined as a 'const unsigned' mask. It should have been a 64 bit quantity instead. That means, ResourceUnitMask was always implicitly truncated to a 32 bit quantity. This issue has been found by inspection. Surprisingly, that bug was latent, and it never negatively affected any existing upstream targets. This patch fixes the wrong definition of ResourceUnitMask, and adds a bunch of extra debug prints to help debugging potential issues related to invalid processor resource masks. llvm-svn: 350820
95 lines
3.3 KiB
C++
95 lines
3.3 KiB
C++
//===--------------------- Support.cpp --------------------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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/// \file
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///
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/// This file implements a few helper functions used by various pipeline
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/// components.
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///
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//===----------------------------------------------------------------------===//
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#include "llvm/MCA/Support.h"
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#include "llvm/MC/MCSchedule.h"
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namespace llvm {
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namespace mca {
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#define DEBUG_TYPE "llvm-mca"
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void computeProcResourceMasks(const MCSchedModel &SM,
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MutableArrayRef<uint64_t> Masks) {
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unsigned ProcResourceID = 0;
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assert(Masks.size() == SM.getNumProcResourceKinds() &&
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"Invalid number of elements");
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// Resource at index 0 is the 'InvalidUnit'. Set an invalid mask for it.
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Masks[0] = 0;
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// Create a unique bitmask for every processor resource unit.
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for (unsigned I = 1, E = SM.getNumProcResourceKinds(); I < E; ++I) {
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const MCProcResourceDesc &Desc = *SM.getProcResource(I);
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if (Desc.SubUnitsIdxBegin)
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continue;
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Masks[I] = 1ULL << ProcResourceID;
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ProcResourceID++;
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}
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// Create a unique bitmask for every processor resource group.
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for (unsigned I = 1, E = SM.getNumProcResourceKinds(); I < E; ++I) {
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const MCProcResourceDesc &Desc = *SM.getProcResource(I);
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if (!Desc.SubUnitsIdxBegin)
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continue;
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Masks[I] = 1ULL << ProcResourceID;
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for (unsigned U = 0; U < Desc.NumUnits; ++U) {
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uint64_t OtherMask = Masks[Desc.SubUnitsIdxBegin[U]];
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Masks[I] |= OtherMask;
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}
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ProcResourceID++;
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}
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#ifndef NDEBUG
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LLVM_DEBUG(dbgs() << "\nProcessor resource masks:"
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<< "\n");
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for (unsigned I = 0, E = SM.getNumProcResourceKinds(); I < E; ++I) {
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const MCProcResourceDesc &Desc = *SM.getProcResource(I);
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LLVM_DEBUG(dbgs() << '[' << I << "] " << Desc.Name << " - " << Masks[I]
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<< '\n');
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}
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#endif
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}
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double computeBlockRThroughput(const MCSchedModel &SM, unsigned DispatchWidth,
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unsigned NumMicroOps,
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ArrayRef<unsigned> ProcResourceUsage) {
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// The block throughput is bounded from above by the hardware dispatch
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// throughput. That is because the DispatchWidth is an upper bound on the
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// number of opcodes that can be part of a single dispatch group.
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double Max = static_cast<double>(NumMicroOps) / DispatchWidth;
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// The block throughput is also limited by the amount of hardware parallelism.
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// The number of available resource units affects the resource pressure
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// distribution, as well as how many blocks can be executed every cycle.
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for (unsigned I = 0, E = SM.getNumProcResourceKinds(); I < E; ++I) {
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unsigned ResourceCycles = ProcResourceUsage[I];
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if (!ResourceCycles)
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continue;
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const MCProcResourceDesc &MCDesc = *SM.getProcResource(I);
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double Throughput = static_cast<double>(ResourceCycles) / MCDesc.NumUnits;
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Max = std::max(Max, Throughput);
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}
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// The block reciprocal throughput is computed as the MAX of:
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// - (NumMicroOps / DispatchWidth)
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// - (NumUnits / ResourceCycles) for every consumed processor resource.
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return Max;
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}
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} // namespace mca
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} // namespace llvm
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