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to reflect the new license. We understand that people may be surprised that we're moving the header entirely to discuss the new license. We checked this carefully with the Foundation's lawyer and we believe this is the correct approach. Essentially, all code in the project is now made available by the LLVM project under our new license, so you will see that the license headers include that license only. Some of our contributors have contributed code under our old license, and accordingly, we have retained a copy of our old license notice in the top-level files in each project and repository. llvm-svn: 351636
234 lines
7.6 KiB
C++
234 lines
7.6 KiB
C++
//===- SystemZInstPrinter.cpp - Convert SystemZ MCInst to assembly syntax -===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "SystemZInstPrinter.h"
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#include "llvm/MC/MCExpr.h"
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#include "llvm/MC/MCInst.h"
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#include "llvm/MC/MCSymbol.h"
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#include "llvm/Support/Casting.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/MathExtras.h"
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#include "llvm/Support/raw_ostream.h"
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#include <cassert>
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#include <cstdint>
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using namespace llvm;
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#define DEBUG_TYPE "asm-printer"
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#include "SystemZGenAsmWriter.inc"
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void SystemZInstPrinter::printAddress(unsigned Base, int64_t Disp,
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unsigned Index, raw_ostream &O) {
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O << Disp;
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if (Base || Index) {
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O << '(';
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if (Index) {
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O << '%' << getRegisterName(Index);
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if (Base)
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O << ',';
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}
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if (Base)
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O << '%' << getRegisterName(Base);
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O << ')';
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}
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}
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void SystemZInstPrinter::printOperand(const MCOperand &MO, const MCAsmInfo *MAI,
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raw_ostream &O) {
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if (MO.isReg())
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O << '%' << getRegisterName(MO.getReg());
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else if (MO.isImm())
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O << MO.getImm();
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else if (MO.isExpr())
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MO.getExpr()->print(O, MAI);
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else
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llvm_unreachable("Invalid operand");
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}
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void SystemZInstPrinter::printInst(const MCInst *MI, raw_ostream &O,
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StringRef Annot,
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const MCSubtargetInfo &STI) {
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printInstruction(MI, O);
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printAnnotation(O, Annot);
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}
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void SystemZInstPrinter::printRegName(raw_ostream &O, unsigned RegNo) const {
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O << '%' << getRegisterName(RegNo);
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}
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template <unsigned N>
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static void printUImmOperand(const MCInst *MI, int OpNum, raw_ostream &O) {
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int64_t Value = MI->getOperand(OpNum).getImm();
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assert(isUInt<N>(Value) && "Invalid uimm argument");
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O << Value;
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}
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template <unsigned N>
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static void printSImmOperand(const MCInst *MI, int OpNum, raw_ostream &O) {
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int64_t Value = MI->getOperand(OpNum).getImm();
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assert(isInt<N>(Value) && "Invalid simm argument");
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O << Value;
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}
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void SystemZInstPrinter::printU1ImmOperand(const MCInst *MI, int OpNum,
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raw_ostream &O) {
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printUImmOperand<1>(MI, OpNum, O);
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}
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void SystemZInstPrinter::printU2ImmOperand(const MCInst *MI, int OpNum,
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raw_ostream &O) {
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printUImmOperand<2>(MI, OpNum, O);
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}
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void SystemZInstPrinter::printU3ImmOperand(const MCInst *MI, int OpNum,
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raw_ostream &O) {
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printUImmOperand<3>(MI, OpNum, O);
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}
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void SystemZInstPrinter::printU4ImmOperand(const MCInst *MI, int OpNum,
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raw_ostream &O) {
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printUImmOperand<4>(MI, OpNum, O);
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}
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void SystemZInstPrinter::printU6ImmOperand(const MCInst *MI, int OpNum,
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raw_ostream &O) {
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printUImmOperand<6>(MI, OpNum, O);
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}
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void SystemZInstPrinter::printS8ImmOperand(const MCInst *MI, int OpNum,
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raw_ostream &O) {
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printSImmOperand<8>(MI, OpNum, O);
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}
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void SystemZInstPrinter::printU8ImmOperand(const MCInst *MI, int OpNum,
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raw_ostream &O) {
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printUImmOperand<8>(MI, OpNum, O);
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}
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void SystemZInstPrinter::printU12ImmOperand(const MCInst *MI, int OpNum,
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raw_ostream &O) {
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printUImmOperand<12>(MI, OpNum, O);
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}
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void SystemZInstPrinter::printS16ImmOperand(const MCInst *MI, int OpNum,
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raw_ostream &O) {
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printSImmOperand<16>(MI, OpNum, O);
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}
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void SystemZInstPrinter::printU16ImmOperand(const MCInst *MI, int OpNum,
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raw_ostream &O) {
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printUImmOperand<16>(MI, OpNum, O);
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}
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void SystemZInstPrinter::printS32ImmOperand(const MCInst *MI, int OpNum,
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raw_ostream &O) {
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printSImmOperand<32>(MI, OpNum, O);
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}
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void SystemZInstPrinter::printU32ImmOperand(const MCInst *MI, int OpNum,
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raw_ostream &O) {
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printUImmOperand<32>(MI, OpNum, O);
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}
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void SystemZInstPrinter::printU48ImmOperand(const MCInst *MI, int OpNum,
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raw_ostream &O) {
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printUImmOperand<48>(MI, OpNum, O);
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}
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void SystemZInstPrinter::printPCRelOperand(const MCInst *MI, int OpNum,
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raw_ostream &O) {
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const MCOperand &MO = MI->getOperand(OpNum);
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if (MO.isImm()) {
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O << "0x";
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O.write_hex(MO.getImm());
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} else
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MO.getExpr()->print(O, &MAI);
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}
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void SystemZInstPrinter::printPCRelTLSOperand(const MCInst *MI, int OpNum,
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raw_ostream &O) {
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// Output the PC-relative operand.
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printPCRelOperand(MI, OpNum, O);
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// Output the TLS marker if present.
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if ((unsigned)OpNum + 1 < MI->getNumOperands()) {
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const MCOperand &MO = MI->getOperand(OpNum + 1);
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const MCSymbolRefExpr &refExp = cast<MCSymbolRefExpr>(*MO.getExpr());
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switch (refExp.getKind()) {
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case MCSymbolRefExpr::VK_TLSGD:
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O << ":tls_gdcall:";
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break;
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case MCSymbolRefExpr::VK_TLSLDM:
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O << ":tls_ldcall:";
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break;
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default:
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llvm_unreachable("Unexpected symbol kind");
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}
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O << refExp.getSymbol().getName();
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}
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}
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void SystemZInstPrinter::printOperand(const MCInst *MI, int OpNum,
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raw_ostream &O) {
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printOperand(MI->getOperand(OpNum), &MAI, O);
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}
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void SystemZInstPrinter::printBDAddrOperand(const MCInst *MI, int OpNum,
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raw_ostream &O) {
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printAddress(MI->getOperand(OpNum).getReg(),
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MI->getOperand(OpNum + 1).getImm(), 0, O);
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}
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void SystemZInstPrinter::printBDXAddrOperand(const MCInst *MI, int OpNum,
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raw_ostream &O) {
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printAddress(MI->getOperand(OpNum).getReg(),
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MI->getOperand(OpNum + 1).getImm(),
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MI->getOperand(OpNum + 2).getReg(), O);
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}
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void SystemZInstPrinter::printBDLAddrOperand(const MCInst *MI, int OpNum,
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raw_ostream &O) {
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unsigned Base = MI->getOperand(OpNum).getReg();
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uint64_t Disp = MI->getOperand(OpNum + 1).getImm();
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uint64_t Length = MI->getOperand(OpNum + 2).getImm();
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O << Disp << '(' << Length;
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if (Base)
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O << ",%" << getRegisterName(Base);
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O << ')';
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}
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void SystemZInstPrinter::printBDRAddrOperand(const MCInst *MI, int OpNum,
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raw_ostream &O) {
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unsigned Base = MI->getOperand(OpNum).getReg();
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uint64_t Disp = MI->getOperand(OpNum + 1).getImm();
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unsigned Length = MI->getOperand(OpNum + 2).getReg();
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O << Disp << "(%" << getRegisterName(Length);
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if (Base)
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O << ",%" << getRegisterName(Base);
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O << ')';
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}
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void SystemZInstPrinter::printBDVAddrOperand(const MCInst *MI, int OpNum,
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raw_ostream &O) {
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printAddress(MI->getOperand(OpNum).getReg(),
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MI->getOperand(OpNum + 1).getImm(),
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MI->getOperand(OpNum + 2).getReg(), O);
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}
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void SystemZInstPrinter::printCond4Operand(const MCInst *MI, int OpNum,
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raw_ostream &O) {
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static const char *const CondNames[] = {
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"o", "h", "nle", "l", "nhe", "lh", "ne",
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"e", "nlh", "he", "nl", "le", "nh", "no"
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};
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uint64_t Imm = MI->getOperand(OpNum).getImm();
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assert(Imm > 0 && Imm < 15 && "Invalid condition");
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O << CondNames[Imm - 1];
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}
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