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to reflect the new license. We understand that people may be surprised that we're moving the header entirely to discuss the new license. We checked this carefully with the Foundation's lawyer and we believe this is the correct approach. Essentially, all code in the project is now made available by the LLVM project under our new license, so you will see that the license headers include that license only. Some of our contributors have contributed code under our old license, and accordingly, we have retained a copy of our old license notice in the top-level files in each project and repository. llvm-svn: 351636
92 lines
3.3 KiB
C++
92 lines
3.3 KiB
C++
//===- MipsCallLowering.h ---------------------------------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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/// \file
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/// This file describes how to lower LLVM calls to machine code calls.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_MIPS_MIPSCALLLOWERING_H
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#define LLVM_LIB_TARGET_MIPS_MIPSCALLLOWERING_H
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#include "llvm/CodeGen/GlobalISel/CallLowering.h"
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namespace llvm {
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class MipsTargetLowering;
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class MipsCallLowering : public CallLowering {
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public:
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class MipsHandler {
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public:
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MipsHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI)
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: MIRBuilder(MIRBuilder), MRI(MRI) {}
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virtual ~MipsHandler() = default;
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bool handle(ArrayRef<CCValAssign> ArgLocs,
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ArrayRef<CallLowering::ArgInfo> Args);
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protected:
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bool assignVRegs(ArrayRef<unsigned> VRegs, ArrayRef<CCValAssign> ArgLocs,
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unsigned Index);
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void setLeastSignificantFirst(SmallVectorImpl<unsigned> &VRegs);
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MachineIRBuilder &MIRBuilder;
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MachineRegisterInfo &MRI;
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private:
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bool assign(unsigned VReg, const CCValAssign &VA);
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virtual unsigned getStackAddress(const CCValAssign &VA,
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MachineMemOperand *&MMO) = 0;
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virtual void assignValueToReg(unsigned ValVReg, const CCValAssign &VA) = 0;
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virtual void assignValueToAddress(unsigned ValVReg,
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const CCValAssign &VA) = 0;
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virtual bool handleSplit(SmallVectorImpl<unsigned> &VRegs,
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ArrayRef<CCValAssign> ArgLocs,
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unsigned ArgLocsStartIndex, unsigned ArgsReg) = 0;
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};
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MipsCallLowering(const MipsTargetLowering &TLI);
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bool lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val,
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ArrayRef<unsigned> VRegs) const override;
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bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F,
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ArrayRef<unsigned> VRegs) const override;
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bool lowerCall(MachineIRBuilder &MIRBuilder, CallingConv::ID CallConv,
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const MachineOperand &Callee, const ArgInfo &OrigRet,
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ArrayRef<ArgInfo> OrigArgs) const override;
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private:
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/// Based on registers available on target machine split or extend
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/// type if needed, also change pointer type to appropriate integer
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/// type.
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template <typename T>
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void subTargetRegTypeForCallingConv(const Function &F, ArrayRef<ArgInfo> Args,
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ArrayRef<unsigned> OrigArgIndices,
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SmallVectorImpl<T> &ISDArgs) const;
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/// Split structures and arrays, save original argument indices since
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/// Mips calling convention needs info about original argument type.
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void splitToValueTypes(const ArgInfo &OrigArg, unsigned OriginalIndex,
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SmallVectorImpl<ArgInfo> &SplitArgs,
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SmallVectorImpl<unsigned> &SplitArgsOrigIndices) const;
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};
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} // end namespace llvm
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#endif // LLVM_LIB_TARGET_MIPS_MIPSCALLLOWERING_H
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