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49045c6a0d
Reapply r346374 with the fixes for modules build. Original summary: This change implements assembler parser, code emitter, ELF object writer and disassembler for the MSP430 ISA. Also, more instruction forms are added to the target description. Patch by Michael Skvortsov! llvm-svn: 346948
139 lines
4.1 KiB
C++
139 lines
4.1 KiB
C++
//===-- MSP430InstPrinter.cpp - Convert MSP430 MCInst to assembly syntax --===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This class prints an MSP430 MCInst to a .s file.
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//
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//===----------------------------------------------------------------------===//
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#include "MSP430InstPrinter.h"
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#include "MSP430.h"
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#include "llvm/MC/MCAsmInfo.h"
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#include "llvm/MC/MCExpr.h"
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#include "llvm/MC/MCInst.h"
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#include "llvm/MC/MCInstrInfo.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/FormattedStream.h"
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using namespace llvm;
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#define DEBUG_TYPE "asm-printer"
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// Include the auto-generated portion of the assembly writer.
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#define PRINT_ALIAS_INSTR
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#include "MSP430GenAsmWriter.inc"
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void MSP430InstPrinter::printInst(const MCInst *MI, raw_ostream &O,
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StringRef Annot, const MCSubtargetInfo &STI) {
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if (!printAliasInstr(MI, O))
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printInstruction(MI, O);
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printAnnotation(O, Annot);
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}
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void MSP430InstPrinter::printPCRelImmOperand(const MCInst *MI, unsigned OpNo,
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raw_ostream &O) {
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const MCOperand &Op = MI->getOperand(OpNo);
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if (Op.isImm()) {
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int64_t Imm = Op.getImm() * 2 + 2;
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O << "$";
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if (Imm >= 0)
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O << '+';
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O << Imm;
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} else {
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assert(Op.isExpr() && "unknown pcrel immediate operand");
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Op.getExpr()->print(O, &MAI);
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}
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}
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void MSP430InstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
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raw_ostream &O, const char *Modifier) {
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assert((Modifier == nullptr || Modifier[0] == 0) && "No modifiers supported");
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const MCOperand &Op = MI->getOperand(OpNo);
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if (Op.isReg()) {
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O << getRegisterName(Op.getReg());
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} else if (Op.isImm()) {
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O << '#' << Op.getImm();
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} else {
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assert(Op.isExpr() && "unknown operand kind in printOperand");
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O << '#';
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Op.getExpr()->print(O, &MAI);
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}
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}
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void MSP430InstPrinter::printSrcMemOperand(const MCInst *MI, unsigned OpNo,
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raw_ostream &O,
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const char *Modifier) {
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const MCOperand &Base = MI->getOperand(OpNo);
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const MCOperand &Disp = MI->getOperand(OpNo+1);
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// Print displacement first
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// If the global address expression is a part of displacement field with a
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// register base, we should not emit any prefix symbol here, e.g.
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// mov.w &foo, r1
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// vs
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// mov.w glb(r1), r2
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// Otherwise (!) msp430-as will silently miscompile the output :(
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if (Base.getReg() == MSP430::SR)
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O << '&';
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if (Disp.isExpr())
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Disp.getExpr()->print(O, &MAI);
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else {
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assert(Disp.isImm() && "Expected immediate in displacement field");
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O << Disp.getImm();
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}
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// Print register base field
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if ((Base.getReg() != MSP430::SR) &&
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(Base.getReg() != MSP430::PC))
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O << '(' << getRegisterName(Base.getReg()) << ')';
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}
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void MSP430InstPrinter::printIndRegOperand(const MCInst *MI, unsigned OpNo,
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raw_ostream &O) {
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const MCOperand &Base = MI->getOperand(OpNo);
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O << "@" << getRegisterName(Base.getReg());
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}
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void MSP430InstPrinter::printPostIndRegOperand(const MCInst *MI, unsigned OpNo,
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raw_ostream &O) {
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const MCOperand &Base = MI->getOperand(OpNo);
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O << "@" << getRegisterName(Base.getReg()) << "+";
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}
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void MSP430InstPrinter::printCCOperand(const MCInst *MI, unsigned OpNo,
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raw_ostream &O) {
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unsigned CC = MI->getOperand(OpNo).getImm();
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switch (CC) {
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default:
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llvm_unreachable("Unsupported CC code");
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case MSP430CC::COND_E:
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O << "eq";
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break;
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case MSP430CC::COND_NE:
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O << "ne";
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break;
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case MSP430CC::COND_HS:
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O << "hs";
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break;
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case MSP430CC::COND_LO:
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O << "lo";
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break;
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case MSP430CC::COND_GE:
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O << "ge";
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break;
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case MSP430CC::COND_L:
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O << 'l';
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break;
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case MSP430CC::COND_N:
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O << 'n';
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break;
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}
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}
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