Oliver Stannard 4cf35b4ab0 [ARM][MC] Move information about variadic register defs into tablegen ... Currently, variadic operands on an MCInst are assumed to be uses, because they come after the defs. However, this is not always the case, for example the Arm/Thumb LDM instructions write to a variable number of registers. This adds a property of instruction definitions which can be used to mark variadic operands as defs. This only affects MCInst, because MachineInstruction already tracks use/def per operand in each instance of the instruction, so can already represent this. This property can then be checked in MCInstrDesc, allowing us to remove some special cases in ARMAsmParser::isITBlockTerminator. Differential revision: https://reviews.llvm.org/D54853 llvm-svn: 348114		2018-12-03 10:32:42 +00:00
..
ARMAsmParser.cpp	[ARM][MC] Move information about variadic register defs into tablegen	2018-12-03 10:32:42 +00:00
CMakeLists.txt
LLVMBuild.txt	[ARM] Add dependency from ARMAsmParser to ARMAsmPrinter after r347494	2018-11-23 23:43:46 +00:00