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https://github.com/Gericom/teak-llvm.git
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e56360a2cd
Summary: Before this patch, we computed the offsets in memory of args passed to GPU kernel functions by throwing all of the args into an LLVM struct. clang emits packed llvm structs basically whenever it feels like it, and packed structs have alignment 1. So we cannot rely on the llvm type's alignment matching the C++ type's alignment. This patch fixes our codegen so we always respect the clang types' alignments. Reviewers: rnk Subscribers: cfe-commits, tra Differential Revision: https://reviews.llvm.org/D22879 llvm-svn: 276927
37 lines
1.2 KiB
Plaintext
37 lines
1.2 KiB
Plaintext
// RUN: %clang_cc1 --std=c++11 -triple x86_64-unknown-linux-gnu -emit-llvm -o - %s | \
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// RUN: FileCheck -check-prefix HOST -check-prefix CHECK %s
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// RUN: %clang_cc1 --std=c++11 -fcuda-is-device -triple nvptx64-nvidia-cuda \
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// RUN: -emit-llvm -o - %s | FileCheck -check-prefix DEVICE -check-prefix CHECK %s
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#include "Inputs/cuda.h"
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struct U {
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short x;
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} __attribute__((packed));
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struct S {
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int *ptr;
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char a;
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U u;
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};
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// Clang should generate a packed LLVM struct for S (denoted by the <>s),
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// otherwise this test isn't interesting.
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// CHECK: %struct.S = type <{ i32*, i8, %struct.U, [5 x i8] }>
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static_assert(alignof(S) == 8, "Unexpected alignment.");
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// HOST-LABEL: @_Z6kernelc1SPi
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// Marshalled kernel args should be:
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// 1. offset 0, width 1
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// 2. offset 8 (because alignof(S) == 8), width 16
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// 3. offset 24, width 8
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// HOST: call i32 @cudaSetupArgument({{[^,]*}}, i64 1, i64 0)
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// HOST: call i32 @cudaSetupArgument({{[^,]*}}, i64 16, i64 8)
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// HOST: call i32 @cudaSetupArgument({{[^,]*}}, i64 8, i64 24)
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// DEVICE-LABEL: @_Z6kernelc1SPi
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// DEVICE-SAME: i8{{[^,]*}}, %struct.S* byval align 8{{[^,]*}}, i32*
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__global__ void kernel(char a, S s, int *b) {}
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