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Commit message from D66935: This patch fixes a bug exposed by D65653 where a subsequent invocation of `determineCalleeSaves` ends up with a different size for the callee save area, leading to different frame-offsets in debug information. In the invocation by PEI, `determineCalleeSaves` tries to determine whether it needs to spill an extra callee-saved register to get an emergency spill slot. To do this, it calls 'estimateStackSize' and manually adds the size of the callee-saves to this. PEI then allocates the spill objects for the callee saves and the remaining frame layout is calculated accordingly. A second invocation in LiveDebugValues causes estimateStackSize to return the size of the stack frame including the callee-saves. Given that the size of the callee-saves is added to this, these callee-saves are counted twice, which leads `determineCalleeSaves` to believe the stack has become big enough to require spilling an extra callee-save as emergency spillslot. It then updates CalleeSavedStackSize with a larger value. Since CalleeSavedStackSize is used in the calculation of the frame offset in getFrameIndexReference, this leads to incorrect offsets for variables/locals when this information is recalculated after PEI. This patch fixes the lldb unit tests in `functionalities/thread/concurrent_events/*` Changes after D66935: Ensures AArch64FunctionInfo::getCalleeSavedStackSize does not return the uninitialized CalleeSavedStackSize when running `llc` on a specific pass where the MIR code has already been expected to have gone through PEI. Instead, getCalleeSavedStackSize (when passed the MachineFrameInfo) will try to recalculate the CalleeSavedStackSize from the CalleeSavedInfo. In debug mode, the compiler will assert the recalculated size equals the cached size as calculated through a call to determineCalleeSaves. This fixes two tests: test/DebugInfo/AArch64/asan-stack-vars.mir test/DebugInfo/AArch64/compiler-gen-bbs-livedebugvalues.mir that otherwise fail when compiled using msan. Reviewed By: omjavaid, efriedma Tags: #llvm Differential Revision: https://reviews.llvm.org/D68783 llvm-svn: 375425
157 lines
5.9 KiB
C++
157 lines
5.9 KiB
C++
//===- TargetFrameLoweringImpl.cpp - Implement target frame interface ------==//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// Implements the layout of a stack frame on the target machine.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/ADT/BitVector.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/CodeGen/TargetFrameLowering.h"
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#include "llvm/CodeGen/TargetRegisterInfo.h"
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#include "llvm/CodeGen/TargetSubtargetInfo.h"
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#include "llvm/IR/Attributes.h"
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#include "llvm/IR/CallSite.h"
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#include "llvm/IR/CallingConv.h"
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#include "llvm/IR/Function.h"
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#include "llvm/MC/MCRegisterInfo.h"
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#include "llvm/Support/Compiler.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetOptions.h"
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using namespace llvm;
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TargetFrameLowering::~TargetFrameLowering() = default;
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bool TargetFrameLowering::enableCalleeSaveSkip(const MachineFunction &MF) const {
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assert(MF.getFunction().hasFnAttribute(Attribute::NoReturn) &&
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MF.getFunction().hasFnAttribute(Attribute::NoUnwind) &&
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!MF.getFunction().hasFnAttribute(Attribute::UWTable));
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return false;
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}
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/// Returns the displacement from the frame register to the stack
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/// frame of the specified index, along with the frame register used
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/// (in output arg FrameReg). This is the default implementation which
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/// is overridden for some targets.
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int TargetFrameLowering::getFrameIndexReference(const MachineFunction &MF,
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int FI, unsigned &FrameReg) const {
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const MachineFrameInfo &MFI = MF.getFrameInfo();
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const TargetRegisterInfo *RI = MF.getSubtarget().getRegisterInfo();
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// By default, assume all frame indices are referenced via whatever
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// getFrameRegister() says. The target can override this if it's doing
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// something different.
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FrameReg = RI->getFrameRegister(MF);
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return MFI.getObjectOffset(FI) + MFI.getStackSize() -
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getOffsetOfLocalArea() + MFI.getOffsetAdjustment();
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}
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bool TargetFrameLowering::needsFrameIndexResolution(
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const MachineFunction &MF) const {
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return MF.getFrameInfo().hasStackObjects();
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}
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void TargetFrameLowering::getCalleeSaves(const MachineFunction &MF,
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BitVector &CalleeSaves) const {
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const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo();
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CalleeSaves.resize(TRI.getNumRegs());
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const MachineFrameInfo &MFI = MF.getFrameInfo();
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if (!MFI.isCalleeSavedInfoValid())
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return;
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for (const CalleeSavedInfo &Info : MFI.getCalleeSavedInfo())
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CalleeSaves.set(Info.getReg());
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}
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void TargetFrameLowering::determineCalleeSaves(MachineFunction &MF,
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BitVector &SavedRegs,
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RegScavenger *RS) const {
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const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo();
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// Resize before the early returns. Some backends expect that
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// SavedRegs.size() == TRI.getNumRegs() after this call even if there are no
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// saved registers.
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SavedRegs.resize(TRI.getNumRegs());
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// When interprocedural register allocation is enabled caller saved registers
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// are preferred over callee saved registers.
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if (MF.getTarget().Options.EnableIPRA &&
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isSafeForNoCSROpt(MF.getFunction()) &&
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isProfitableForNoCSROpt(MF.getFunction()))
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return;
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// Get the callee saved register list...
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const MCPhysReg *CSRegs = MF.getRegInfo().getCalleeSavedRegs();
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// Early exit if there are no callee saved registers.
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if (!CSRegs || CSRegs[0] == 0)
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return;
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// In Naked functions we aren't going to save any registers.
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if (MF.getFunction().hasFnAttribute(Attribute::Naked))
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return;
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// Noreturn+nounwind functions never restore CSR, so no saves are needed.
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// Purely noreturn functions may still return through throws, so those must
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// save CSR for caller exception handlers.
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//
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// If the function uses longjmp to break out of its current path of
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// execution we do not need the CSR spills either: setjmp stores all CSRs
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// it was called with into the jmp_buf, which longjmp then restores.
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if (MF.getFunction().hasFnAttribute(Attribute::NoReturn) &&
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MF.getFunction().hasFnAttribute(Attribute::NoUnwind) &&
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!MF.getFunction().hasFnAttribute(Attribute::UWTable) &&
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enableCalleeSaveSkip(MF))
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return;
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// Functions which call __builtin_unwind_init get all their registers saved.
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bool CallsUnwindInit = MF.callsUnwindInit();
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const MachineRegisterInfo &MRI = MF.getRegInfo();
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for (unsigned i = 0; CSRegs[i]; ++i) {
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unsigned Reg = CSRegs[i];
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if (CallsUnwindInit || MRI.isPhysRegModified(Reg))
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SavedRegs.set(Reg);
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}
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}
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unsigned TargetFrameLowering::getStackAlignmentSkew(
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const MachineFunction &MF) const {
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// When HHVM function is called, the stack is skewed as the return address
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// is removed from the stack before we enter the function.
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if (LLVM_UNLIKELY(MF.getFunction().getCallingConv() == CallingConv::HHVM))
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return MF.getTarget().getAllocaPointerSize();
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return 0;
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}
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bool TargetFrameLowering::isSafeForNoCSROpt(const Function &F) {
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if (!F.hasLocalLinkage() || F.hasAddressTaken() ||
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!F.hasFnAttribute(Attribute::NoRecurse))
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return false;
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// Function should not be optimized as tail call.
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for (const User *U : F.users())
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if (auto CS = ImmutableCallSite(U))
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if (CS.isTailCall())
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return false;
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return true;
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}
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int TargetFrameLowering::getInitialCFAOffset(const MachineFunction &MF) const {
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llvm_unreachable("getInitialCFAOffset() not implemented!");
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}
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unsigned TargetFrameLowering::getInitialCFARegister(const MachineFunction &MF)
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const {
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llvm_unreachable("getInitialCFARegister() not implemented!");
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}
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