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https://github.com/Gericom/teak-llvm.git
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5ad5f15cff
directory. These passes are already defined in the IR library, and it doesn't make any sense to have the headers in Analysis. Long term, I think there is going to be a much better way to divide these matters. The dominators code should be fully separated into the abstract graph algorithm and have that put in Support where it becomes obvious that evn Clang's CFGBlock's can use it. Then the verifier can manually construct dominance information from the Support-driven interface while the Analysis library can provide a pass which both caches, reconstructs, and supports a nice update API. But those are very long term, and so I don't want to leave the really confusing structure until that day arrives. llvm-svn: 199082
377 lines
10 KiB
C++
377 lines
10 KiB
C++
//===- CFGTest.cpp - CFG tests --------------------------------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/Analysis/CFG.h"
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#include "llvm/ADT/OwningPtr.h"
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#include "llvm/Analysis/LoopInfo.h"
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#include "llvm/AsmParser/Parser.h"
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#include "llvm/IR/Dominators.h"
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#include "llvm/IR/Function.h"
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#include "llvm/IR/LLVMContext.h"
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#include "llvm/IR/Module.h"
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#include "llvm/Pass.h"
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#include "llvm/PassManager.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/InstIterator.h"
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#include "llvm/Support/SourceMgr.h"
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#include "gtest/gtest.h"
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using namespace llvm;
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namespace {
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// This fixture assists in running the isPotentiallyReachable utility four ways
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// and ensuring it produces the correct answer each time.
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class IsPotentiallyReachableTest : public testing::Test {
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protected:
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void ParseAssembly(const char *Assembly) {
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M.reset(new Module("Module", getGlobalContext()));
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SMDiagnostic Error;
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bool Parsed = ParseAssemblyString(Assembly, M.get(),
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Error, M->getContext()) == M.get();
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std::string errMsg;
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raw_string_ostream os(errMsg);
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Error.print("", os);
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if (!Parsed) {
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// A failure here means that the test itself is buggy.
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report_fatal_error(os.str().c_str());
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}
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Function *F = M->getFunction("test");
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if (F == NULL)
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report_fatal_error("Test must have a function named @test");
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A = B = NULL;
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for (inst_iterator I = inst_begin(F), E = inst_end(F); I != E; ++I) {
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if (I->hasName()) {
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if (I->getName() == "A")
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A = &*I;
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else if (I->getName() == "B")
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B = &*I;
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}
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}
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if (A == NULL)
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report_fatal_error("@test must have an instruction %A");
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if (B == NULL)
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report_fatal_error("@test must have an instruction %B");
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}
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void ExpectPath(bool ExpectedResult) {
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static char ID;
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class IsPotentiallyReachableTestPass : public FunctionPass {
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public:
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IsPotentiallyReachableTestPass(bool ExpectedResult,
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Instruction *A, Instruction *B)
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: FunctionPass(ID), ExpectedResult(ExpectedResult), A(A), B(B) {}
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static int initialize() {
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PassInfo *PI = new PassInfo("isPotentiallyReachable testing pass",
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"", &ID, 0, true, true);
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PassRegistry::getPassRegistry()->registerPass(*PI, false);
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initializeLoopInfoPass(*PassRegistry::getPassRegistry());
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initializeDominatorTreePass(*PassRegistry::getPassRegistry());
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return 0;
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}
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void getAnalysisUsage(AnalysisUsage &AU) const {
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AU.setPreservesAll();
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AU.addRequired<LoopInfo>();
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AU.addRequired<DominatorTree>();
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}
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bool runOnFunction(Function &F) {
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if (!F.hasName() || F.getName() != "test")
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return false;
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LoopInfo *LI = &getAnalysis<LoopInfo>();
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DominatorTree *DT = &getAnalysis<DominatorTree>();
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EXPECT_EQ(isPotentiallyReachable(A, B, 0, 0), ExpectedResult);
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EXPECT_EQ(isPotentiallyReachable(A, B, DT, 0), ExpectedResult);
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EXPECT_EQ(isPotentiallyReachable(A, B, 0, LI), ExpectedResult);
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EXPECT_EQ(isPotentiallyReachable(A, B, DT, LI), ExpectedResult);
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return false;
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}
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bool ExpectedResult;
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Instruction *A, *B;
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};
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static int initialize = IsPotentiallyReachableTestPass::initialize();
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(void)initialize;
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IsPotentiallyReachableTestPass *P =
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new IsPotentiallyReachableTestPass(ExpectedResult, A, B);
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PassManager PM;
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PM.add(P);
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PM.run(*M);
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}
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private:
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OwningPtr<Module> M;
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Instruction *A, *B;
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};
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}
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TEST_F(IsPotentiallyReachableTest, SameBlockNoPath) {
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ParseAssembly(
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"define void @test() {\n"
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"entry:\n"
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" bitcast i8 undef to i8\n"
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" %B = bitcast i8 undef to i8\n"
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" bitcast i8 undef to i8\n"
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" bitcast i8 undef to i8\n"
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" %A = bitcast i8 undef to i8\n"
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" ret void\n"
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"}\n");
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ExpectPath(false);
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}
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TEST_F(IsPotentiallyReachableTest, SameBlockPath) {
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ParseAssembly(
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"define void @test() {\n"
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"entry:\n"
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" %A = bitcast i8 undef to i8\n"
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" bitcast i8 undef to i8\n"
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" bitcast i8 undef to i8\n"
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" %B = bitcast i8 undef to i8\n"
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" ret void\n"
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"}\n");
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ExpectPath(true);
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}
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TEST_F(IsPotentiallyReachableTest, SameBlockNoLoop) {
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ParseAssembly(
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"define void @test() {\n"
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"entry:\n"
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" br label %middle\n"
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"middle:\n"
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" %B = bitcast i8 undef to i8\n"
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" bitcast i8 undef to i8\n"
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" bitcast i8 undef to i8\n"
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" %A = bitcast i8 undef to i8\n"
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" br label %nextblock\n"
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"nextblock:\n"
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" ret void\n"
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"}\n");
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ExpectPath(false);
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}
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TEST_F(IsPotentiallyReachableTest, StraightNoPath) {
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ParseAssembly(
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"define void @test() {\n"
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"entry:\n"
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" %B = bitcast i8 undef to i8\n"
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" br label %exit\n"
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"exit:\n"
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" %A = bitcast i8 undef to i8\n"
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" ret void\n"
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"}");
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ExpectPath(false);
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}
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TEST_F(IsPotentiallyReachableTest, StraightPath) {
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ParseAssembly(
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"define void @test() {\n"
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"entry:\n"
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" %A = bitcast i8 undef to i8\n"
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" br label %exit\n"
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"exit:\n"
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" %B = bitcast i8 undef to i8\n"
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" ret void\n"
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"}");
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ExpectPath(true);
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}
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TEST_F(IsPotentiallyReachableTest, DestUnreachable) {
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ParseAssembly(
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"define void @test() {\n"
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"entry:\n"
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" br label %midblock\n"
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"midblock:\n"
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" %A = bitcast i8 undef to i8\n"
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" ret void\n"
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"unreachable:\n"
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" %B = bitcast i8 undef to i8\n"
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" br label %midblock\n"
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"}");
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ExpectPath(false);
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}
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TEST_F(IsPotentiallyReachableTest, BranchToReturn) {
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ParseAssembly(
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"define void @test(i1 %x) {\n"
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"entry:\n"
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" %A = bitcast i8 undef to i8\n"
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" br i1 %x, label %block1, label %block2\n"
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"block1:\n"
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" ret void\n"
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"block2:\n"
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" %B = bitcast i8 undef to i8\n"
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" ret void\n"
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"}");
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ExpectPath(true);
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}
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TEST_F(IsPotentiallyReachableTest, SimpleLoop1) {
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ParseAssembly(
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"declare i1 @switch()\n"
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"\n"
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"define void @test() {\n"
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"entry:\n"
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" br label %loop\n"
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"loop:\n"
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" %B = bitcast i8 undef to i8\n"
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" %A = bitcast i8 undef to i8\n"
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" %x = call i1 @switch()\n"
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" br i1 %x, label %loop, label %exit\n"
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"exit:\n"
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" ret void\n"
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"}");
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ExpectPath(true);
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}
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TEST_F(IsPotentiallyReachableTest, SimpleLoop2) {
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ParseAssembly(
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"declare i1 @switch()\n"
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"\n"
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"define void @test() {\n"
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"entry:\n"
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" %B = bitcast i8 undef to i8\n"
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" br label %loop\n"
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"loop:\n"
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" %A = bitcast i8 undef to i8\n"
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" %x = call i1 @switch()\n"
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" br i1 %x, label %loop, label %exit\n"
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"exit:\n"
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" ret void\n"
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"}");
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ExpectPath(false);
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}
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TEST_F(IsPotentiallyReachableTest, SimpleLoop3) {
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ParseAssembly(
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"declare i1 @switch()\n"
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"\n"
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"define void @test() {\n"
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"entry:\n"
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" br label %loop\n"
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"loop:\n"
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" %B = bitcast i8 undef to i8\n"
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" %x = call i1 @switch()\n"
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" br i1 %x, label %loop, label %exit\n"
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"exit:\n"
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" %A = bitcast i8 undef to i8\n"
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" ret void\n"
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"}");
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ExpectPath(false);
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}
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TEST_F(IsPotentiallyReachableTest, OneLoopAfterTheOther1) {
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ParseAssembly(
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"declare i1 @switch()\n"
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"\n"
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"define void @test() {\n"
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"entry:\n"
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" br label %loop1\n"
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"loop1:\n"
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" %A = bitcast i8 undef to i8\n"
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" %x = call i1 @switch()\n"
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" br i1 %x, label %loop1, label %loop1exit\n"
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"loop1exit:\n"
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" br label %loop2\n"
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"loop2:\n"
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" %B = bitcast i8 undef to i8\n"
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" %y = call i1 @switch()\n"
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" br i1 %x, label %loop2, label %loop2exit\n"
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"loop2exit:"
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" ret void\n"
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"}");
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ExpectPath(true);
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}
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TEST_F(IsPotentiallyReachableTest, OneLoopAfterTheOther2) {
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ParseAssembly(
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"declare i1 @switch()\n"
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"\n"
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"define void @test() {\n"
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"entry:\n"
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" br label %loop1\n"
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"loop1:\n"
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" %B = bitcast i8 undef to i8\n"
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" %x = call i1 @switch()\n"
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" br i1 %x, label %loop1, label %loop1exit\n"
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"loop1exit:\n"
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" br label %loop2\n"
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"loop2:\n"
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" %A = bitcast i8 undef to i8\n"
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" %y = call i1 @switch()\n"
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" br i1 %x, label %loop2, label %loop2exit\n"
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"loop2exit:"
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" ret void\n"
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"}");
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ExpectPath(false);
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}
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TEST_F(IsPotentiallyReachableTest, OneLoopAfterTheOtherInsideAThirdLoop) {
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ParseAssembly(
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"declare i1 @switch()\n"
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"\n"
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"define void @test() {\n"
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"entry:\n"
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" br label %outerloop3\n"
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"outerloop3:\n"
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" br label %innerloop1\n"
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"innerloop1:\n"
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" %B = bitcast i8 undef to i8\n"
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" %x = call i1 @switch()\n"
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" br i1 %x, label %innerloop1, label %innerloop1exit\n"
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"innerloop1exit:\n"
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" br label %innerloop2\n"
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"innerloop2:\n"
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" %A = bitcast i8 undef to i8\n"
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" %y = call i1 @switch()\n"
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" br i1 %x, label %innerloop2, label %innerloop2exit\n"
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"innerloop2exit:"
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" ;; In outer loop3 now.\n"
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" %z = call i1 @switch()\n"
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" br i1 %z, label %outerloop3, label %exit\n"
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"exit:\n"
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" ret void\n"
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"}");
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ExpectPath(true);
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}
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TEST_F(IsPotentiallyReachableTest, BranchInsideLoop) {
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ParseAssembly(
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"declare i1 @switch()\n"
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"\n"
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"define void @test() {\n"
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"entry:\n"
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" br label %loop\n"
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"loop:\n"
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" %x = call i1 @switch()\n"
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" br i1 %x, label %nextloopblock, label %exit\n"
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"nextloopblock:\n"
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" %y = call i1 @switch()\n"
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" br i1 %y, label %left, label %right\n"
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"left:\n"
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" %A = bitcast i8 undef to i8\n"
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" br label %loop\n"
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"right:\n"
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" %B = bitcast i8 undef to i8\n"
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" br label %loop\n"
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"exit:\n"
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" ret void\n"
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"}");
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ExpectPath(true);
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}
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