mirror of
https://github.com/Gericom/teak-llvm.git
synced 2025-06-19 03:25:54 -04:00
3da44a85b7
Fixed invalid mpy instruction being generated Fixed byte order of 32 bit values when emitted to the elf file Support for addv/subv to modify 16 bit registers directly Support for move 8bit immediate Support for tst0 instruction Support for directly adding p0 to an ab register after mpy Support for 8 bit immediate multiply Support for modr instruction Support for post increase/decrement for loads and stores Use copy instruction for a to a register moves
93 lines
2.9 KiB
C++
93 lines
2.9 KiB
C++
#include "Teak.h"
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#include "TeakInstrInfo.h"
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#include "TeakMachineFunctionInfo.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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using namespace llvm;
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namespace
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{
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class TeakOptimizeMovImmPass : public MachineFunctionPass
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{
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public:
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static char sId;
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TeakOptimizeMovImmPass() : MachineFunctionPass(sId) { }
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bool runOnMachineFunction(MachineFunction& mf) override;
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MachineFunctionProperties getRequiredProperties() const override
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{
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return MachineFunctionProperties()
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.set(MachineFunctionProperties::Property::NoVRegs);
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}
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StringRef getPassName() const override { return "optimise teak move immediate pass"; }
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};
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char TeakOptimizeMovImmPass::sId = 0;
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}
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bool TeakOptimizeMovImmPass::runOnMachineFunction(MachineFunction& mf)
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{
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if (skipFunction(mf.getFunction()))
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return false;
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const TargetInstrInfo* tii = mf.getSubtarget().getInstrInfo();
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std::vector<MachineInstr*> movImms;
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for (auto& mbb : mf)
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{
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for (auto& mi : mbb)
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{
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if (mi.getOpcode() == Teak::MOV_imm16_regnob16 ||
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mi.getOpcode() == Teak::MOV_imm16_ab ||
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mi.getOpcode() == Teak::MOV_imm16_abh)
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{
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movImms.push_back(&mi);
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}
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}
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}
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bool changed = false;
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for (auto mi : movImms)
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{
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if (!mi->getOperand(1).isImm())
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continue;
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unsigned dstReg = mi->getOperand(0).getReg();
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if (mi->getOpcode() == Teak::MOV_imm16_ab)
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dstReg = teakGetAbLReg(dstReg);
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else if (mi->getOpcode() == Teak::MOV_imm16_abh)
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dstReg = teakGetAbHReg(dstReg);
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int64_t imm = mi->getOperand(1).getImm();
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if ((dstReg == Teak::R0 || dstReg == Teak::R1 ||
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dstReg == Teak::R2 || dstReg == Teak::R3 ||
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dstReg == Teak::R4 || dstReg == Teak::R5 ||
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dstReg == Teak::R7 || dstReg == Teak::Y0 ||
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dstReg == Teak::SV || dstReg == Teak::A0H ||
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dstReg == Teak::A1H || dstReg == Teak::EXT0 ||
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dstReg == Teak::EXT1 || dstReg == Teak::EXT2 ||
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dstReg == Teak::EXT3) && imm >= -128 && imm <= 127)
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{
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BuildMI(*mi->getParent(), *mi, mi->getDebugLoc(), tii->get(Teak::MOV_imm8s), dstReg)
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.addImm(imm);
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mi->eraseFromParent();
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changed = true;
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}
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else if ((dstReg == Teak::A0L || dstReg == Teak::A1L) && imm >= 0 && imm <= 255)
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{
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BuildMI(*mi->getParent(), *mi, mi->getDebugLoc(), tii->get(Teak::MOV_imm8u), dstReg)
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.addImm(imm);
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mi->eraseFromParent();
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changed = true;
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}
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}
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return changed;
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}
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FunctionPass* llvm::createTeakOptimizeMovImmPass()
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{
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return new TeakOptimizeMovImmPass();
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} |