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26d11ca4b0
Re-land r321234. It had to be reverted because it broke the shared library build. The shared library build broke because there was a missing LLVMBuild dependency from lib/Passes (which calls TargetMachine::getTargetIRAnalysis) to lib/Target. As far as I can tell, this problem was always there but was somehow masked before (perhaps because TargetMachine::getTargetIRAnalysis was a virtual function). Original commit message: This makes the TargetMachine interface a bit simpler. We still need the std::function in TargetIRAnalysis to avoid having to add a dependency from Analysis to Target. See discussion: http://lists.llvm.org/pipermail/llvm-dev/2017-December/119749.html I avoided adding all of the backend owners to this review since the change is simple, but let me know if you feel differently about this. Reviewers: echristo, MatzeB, hfinkel Reviewed By: hfinkel Subscribers: jholewinski, jfb, arsenm, dschuff, mcrosier, sdardis, nemanjai, nhaehnle, javed.absar, sbc100, jgravelle-google, aheejin, kbarton, llvm-commits Differential Revision: https://reviews.llvm.org/D41464 llvm-svn: 321375
125 lines
4.1 KiB
C++
125 lines
4.1 KiB
C++
//===-- AMDGPUTargetMachine.h - AMDGPU TargetMachine Interface --*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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/// \file
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/// \brief The AMDGPU TargetMachine interface definition for hw codgen targets.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUTARGETMACHINE_H
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#define LLVM_LIB_TARGET_AMDGPU_AMDGPUTARGETMACHINE_H
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#include "AMDGPUIntrinsicInfo.h"
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#include "AMDGPUSubtarget.h"
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#include "llvm/ADT/Optional.h"
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#include "llvm/ADT/StringMap.h"
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#include "llvm/ADT/StringRef.h"
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#include "llvm/Analysis/TargetTransformInfo.h"
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#include "llvm/Support/CodeGen.h"
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#include "llvm/Target/TargetMachine.h"
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#include <memory>
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namespace llvm {
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//===----------------------------------------------------------------------===//
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// AMDGPU Target Machine (R600+)
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//===----------------------------------------------------------------------===//
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class AMDGPUTargetMachine : public LLVMTargetMachine {
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protected:
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std::unique_ptr<TargetLoweringObjectFile> TLOF;
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AMDGPUIntrinsicInfo IntrinsicInfo;
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AMDGPUAS AS;
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StringRef getGPUName(const Function &F) const;
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StringRef getFeatureString(const Function &F) const;
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public:
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static bool EnableLateStructurizeCFG;
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AMDGPUTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
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StringRef FS, TargetOptions Options,
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Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
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CodeGenOpt::Level OL);
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~AMDGPUTargetMachine() override;
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const AMDGPUSubtarget *getSubtargetImpl() const;
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const AMDGPUSubtarget *getSubtargetImpl(const Function &) const override = 0;
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const AMDGPUIntrinsicInfo *getIntrinsicInfo() const override {
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return &IntrinsicInfo;
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}
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TargetTransformInfo getTargetTransformInfo(const Function &F) override;
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TargetLoweringObjectFile *getObjFileLowering() const override {
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return TLOF.get();
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}
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AMDGPUAS getAMDGPUAS() const {
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return AS;
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}
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void adjustPassManager(PassManagerBuilder &) override;
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/// Get the integer value of a null pointer in the given address space.
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uint64_t getNullPointerValue(unsigned AddrSpace) const {
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if (AddrSpace == AS.LOCAL_ADDRESS || AddrSpace == AS.REGION_ADDRESS)
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return -1;
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return 0;
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}
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};
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//===----------------------------------------------------------------------===//
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// R600 Target Machine (R600 -> Cayman)
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//===----------------------------------------------------------------------===//
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class R600TargetMachine final : public AMDGPUTargetMachine {
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private:
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mutable StringMap<std::unique_ptr<R600Subtarget>> SubtargetMap;
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public:
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R600TargetMachine(const Target &T, const Triple &TT, StringRef CPU,
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StringRef FS, TargetOptions Options,
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Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
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CodeGenOpt::Level OL, bool JIT);
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TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
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const R600Subtarget *getSubtargetImpl(const Function &) const override;
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bool isMachineVerifierClean() const override {
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return false;
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}
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};
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//===----------------------------------------------------------------------===//
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// GCN Target Machine (SI+)
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//===----------------------------------------------------------------------===//
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class GCNTargetMachine final : public AMDGPUTargetMachine {
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private:
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mutable StringMap<std::unique_ptr<SISubtarget>> SubtargetMap;
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public:
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GCNTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
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StringRef FS, TargetOptions Options,
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Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
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CodeGenOpt::Level OL, bool JIT);
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TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
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const SISubtarget *getSubtargetImpl(const Function &) const override;
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bool useIPRA() const override {
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return true;
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}
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};
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} // end namespace llvm
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#endif // LLVM_LIB_TARGET_AMDGPU_AMDGPUTARGETMACHINE_H
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