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to reflect the new license. We understand that people may be surprised that we're moving the header entirely to discuss the new license. We checked this carefully with the Foundation's lawyer and we believe this is the correct approach. Essentially, all code in the project is now made available by the LLVM project under our new license, so you will see that the license headers include that license only. Some of our contributors have contributed code under our old license, and accordingly, we have retained a copy of our old license notice in the top-level files in each project and repository. llvm-svn: 351636
249 lines
7.5 KiB
C++
249 lines
7.5 KiB
C++
//===- Unix/Memory.cpp - Generic UNIX System Configuration ------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines some functions for various memory management utilities.
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//
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//===----------------------------------------------------------------------===//
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#include "Unix.h"
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#include "llvm/Config/config.h"
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#include "llvm/Support/DataTypes.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/Process.h"
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#ifdef HAVE_SYS_MMAN_H
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#include <sys/mman.h>
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#endif
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#ifdef __APPLE__
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#include <mach/mach.h>
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#endif
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#ifdef __Fuchsia__
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#include <zircon/syscalls.h>
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#endif
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#if defined(__mips__)
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# if defined(__OpenBSD__)
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# include <mips64/sysarch.h>
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# elif !defined(__FreeBSD__)
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# include <sys/cachectl.h>
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# endif
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#endif
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#if defined(__APPLE__)
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extern "C" void sys_icache_invalidate(const void *Addr, size_t len);
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#else
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extern "C" void __clear_cache(void *, void*);
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#endif
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namespace {
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int getPosixProtectionFlags(unsigned Flags) {
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switch (Flags) {
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case llvm::sys::Memory::MF_READ:
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return PROT_READ;
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case llvm::sys::Memory::MF_WRITE:
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return PROT_WRITE;
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case llvm::sys::Memory::MF_READ|llvm::sys::Memory::MF_WRITE:
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return PROT_READ | PROT_WRITE;
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case llvm::sys::Memory::MF_READ|llvm::sys::Memory::MF_EXEC:
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return PROT_READ | PROT_EXEC;
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case llvm::sys::Memory::MF_READ | llvm::sys::Memory::MF_WRITE |
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llvm::sys::Memory::MF_EXEC:
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return PROT_READ | PROT_WRITE | PROT_EXEC;
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case llvm::sys::Memory::MF_EXEC:
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#if defined(__FreeBSD__)
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// On PowerPC, having an executable page that has no read permission
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// can have unintended consequences. The function InvalidateInstruction-
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// Cache uses instructions dcbf and icbi, both of which are treated by
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// the processor as loads. If the page has no read permissions,
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// executing these instructions will result in a segmentation fault.
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// Somehow, this problem is not present on Linux, but it does happen
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// on FreeBSD.
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return PROT_READ | PROT_EXEC;
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#else
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return PROT_EXEC;
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#endif
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default:
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llvm_unreachable("Illegal memory protection flag specified!");
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}
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// Provide a default return value as required by some compilers.
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return PROT_NONE;
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}
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} // anonymous namespace
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namespace llvm {
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namespace sys {
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MemoryBlock
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Memory::allocateMappedMemory(size_t NumBytes,
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const MemoryBlock *const NearBlock,
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unsigned PFlags,
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std::error_code &EC) {
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EC = std::error_code();
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if (NumBytes == 0)
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return MemoryBlock();
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static const size_t PageSize = Process::getPageSize();
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const size_t NumPages = (NumBytes+PageSize-1)/PageSize;
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int fd = -1;
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int MMFlags = MAP_PRIVATE |
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#ifdef MAP_ANONYMOUS
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MAP_ANONYMOUS
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#else
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MAP_ANON
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#endif
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; // Ends statement above
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int Protect = getPosixProtectionFlags(PFlags);
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#if defined(__NetBSD__) && defined(PROT_MPROTECT)
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Protect |= PROT_MPROTECT(PROT_READ | PROT_WRITE | PROT_EXEC);
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#endif
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// Use any near hint and the page size to set a page-aligned starting address
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uintptr_t Start = NearBlock ? reinterpret_cast<uintptr_t>(NearBlock->base()) +
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NearBlock->size() : 0;
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if (Start && Start % PageSize)
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Start += PageSize - Start % PageSize;
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void *Addr = ::mmap(reinterpret_cast<void*>(Start), PageSize*NumPages,
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Protect, MMFlags, fd, 0);
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if (Addr == MAP_FAILED) {
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if (NearBlock) //Try again without a near hint
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return allocateMappedMemory(NumBytes, nullptr, PFlags, EC);
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EC = std::error_code(errno, std::generic_category());
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return MemoryBlock();
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}
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MemoryBlock Result;
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Result.Address = Addr;
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Result.Size = NumPages*PageSize;
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// Rely on protectMappedMemory to invalidate instruction cache.
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if (PFlags & MF_EXEC) {
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EC = Memory::protectMappedMemory (Result, PFlags);
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if (EC != std::error_code())
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return MemoryBlock();
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}
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return Result;
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}
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std::error_code
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Memory::releaseMappedMemory(MemoryBlock &M) {
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if (M.Address == nullptr || M.Size == 0)
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return std::error_code();
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if (0 != ::munmap(M.Address, M.Size))
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return std::error_code(errno, std::generic_category());
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M.Address = nullptr;
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M.Size = 0;
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return std::error_code();
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}
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std::error_code
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Memory::protectMappedMemory(const MemoryBlock &M, unsigned Flags) {
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static const size_t PageSize = Process::getPageSize();
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if (M.Address == nullptr || M.Size == 0)
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return std::error_code();
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if (!Flags)
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return std::error_code(EINVAL, std::generic_category());
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int Protect = getPosixProtectionFlags(Flags);
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uintptr_t Start = alignAddr((uint8_t *)M.Address - PageSize + 1, PageSize);
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uintptr_t End = alignAddr((uint8_t *)M.Address + M.Size, PageSize);
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bool InvalidateCache = (Flags & MF_EXEC);
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#if defined(__arm__) || defined(__aarch64__)
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// Certain ARM implementations treat icache clear instruction as a memory read,
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// and CPU segfaults on trying to clear cache on !PROT_READ page. Therefore we need
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// to temporarily add PROT_READ for the sake of flushing the instruction caches.
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if (InvalidateCache && !(Protect & PROT_READ)) {
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int Result = ::mprotect((void *)Start, End - Start, Protect | PROT_READ);
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if (Result != 0)
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return std::error_code(errno, std::generic_category());
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Memory::InvalidateInstructionCache(M.Address, M.Size);
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InvalidateCache = false;
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}
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#endif
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int Result = ::mprotect((void *)Start, End - Start, Protect);
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if (Result != 0)
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return std::error_code(errno, std::generic_category());
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if (InvalidateCache)
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Memory::InvalidateInstructionCache(M.Address, M.Size);
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return std::error_code();
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}
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/// InvalidateInstructionCache - Before the JIT can run a block of code
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/// that has been emitted it must invalidate the instruction cache on some
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/// platforms.
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void Memory::InvalidateInstructionCache(const void *Addr,
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size_t Len) {
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// icache invalidation for PPC and ARM.
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#if defined(__APPLE__)
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# if (defined(__POWERPC__) || defined (__ppc__) || \
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defined(_POWER) || defined(_ARCH_PPC) || defined(__arm__) || \
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defined(__arm64__))
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sys_icache_invalidate(const_cast<void *>(Addr), Len);
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# endif
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#elif defined(__Fuchsia__)
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zx_status_t Status = zx_cache_flush(Addr, Len, ZX_CACHE_FLUSH_INSN);
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assert(Status == ZX_OK && "cannot invalidate instruction cache");
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#else
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# if (defined(__POWERPC__) || defined (__ppc__) || \
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defined(_POWER) || defined(_ARCH_PPC)) && defined(__GNUC__)
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const size_t LineSize = 32;
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const intptr_t Mask = ~(LineSize - 1);
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const intptr_t StartLine = ((intptr_t) Addr) & Mask;
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const intptr_t EndLine = ((intptr_t) Addr + Len + LineSize - 1) & Mask;
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for (intptr_t Line = StartLine; Line < EndLine; Line += LineSize)
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asm volatile("dcbf 0, %0" : : "r"(Line));
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asm volatile("sync");
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for (intptr_t Line = StartLine; Line < EndLine; Line += LineSize)
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asm volatile("icbi 0, %0" : : "r"(Line));
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asm volatile("isync");
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# elif (defined(__arm__) || defined(__aarch64__) || defined(__mips__)) && \
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defined(__GNUC__)
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// FIXME: Can we safely always call this for __GNUC__ everywhere?
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const char *Start = static_cast<const char *>(Addr);
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const char *End = Start + Len;
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__clear_cache(const_cast<char *>(Start), const_cast<char *>(End));
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# endif
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#endif // end apple
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ValgrindDiscardTranslations(Addr, Len);
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}
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} // namespace sys
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} // namespace llvm
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