teak-llvm/llvm/lib/CodeGen/SelectionDAG
Reid Kleckner 5fe3f00ae2 Replace wrongly deleted header banner, fix formatting
I reviewed the diff hunks of 05da2fe521 that don't contain
'#include' lines, and found two unintended changes. I deleted a header
banner inadvertently while inserting a header, and changed the
indentation of a constructor in an odd way. Add back the banner, and
reformat the constructor.
2019-11-14 10:21:42 -08:00
..
CMakeLists.txt
DAGCombiner.cpp [DAGCombiner] Drop redundant DAG method param. NFC 2019-11-14 14:02:53 +01:00
FastISel.cpp FastISel - fix uninitialized variable warnings in constructor. NFCI. 2019-11-02 18:03:22 +00:00
FunctionLoweringInfo.cpp [AArch64][SVE] Allocate locals that are scalable vectors. 2019-11-13 09:45:24 +00:00
InstrEmitter.cpp [DebugInfo] Remove some users of DBG_VALUEs IsIndirect field 2019-10-15 10:46:24 +00:00
InstrEmitter.h [SelectionDAG] Enhance the simplification of copyto from implicit-def. 2019-05-27 18:26:29 +00:00
LegalizeDAG.cpp [AArch64][X86] Don't assume __powidf2 is available on Windows. 2019-11-08 12:43:21 -08:00
LegalizeFloatTypes.cpp [AArch64][X86] Don't assume __powidf2 is available on Windows. 2019-11-08 12:43:21 -08:00
LegalizeIntegerTypes.cpp [SelectionDAG] Enable lowering unordered atomics loads w/LoadSDNode (and stores w/StoreSDNode) by default 2019-10-29 12:46:24 -07:00
LegalizeTypes.cpp [LegalizeTypes] Remove code for softening a float type to itself. 2019-09-12 05:55:14 +00:00
LegalizeTypes.h [Codegen][ARM] Add float softening for cbrt 2019-10-28 11:08:55 +00:00
LegalizeTypesGeneric.cpp [SelectionDAG] Enable lowering unordered atomics loads w/LoadSDNode (and stores w/StoreSDNode) by default 2019-10-29 12:46:24 -07:00
LegalizeVectorOps.cpp Prune a LegacyDivergenceAnalysis and MachineLoopInfo include each 2019-10-19 01:31:09 +00:00
LegalizeVectorTypes.cpp [SelectionDAG] Add support for FP_ROUND in WidenVectorOperand. 2019-10-30 15:18:21 +00:00
LLVMBuild.txt
ResourcePriorityQueue.cpp
ScheduleDAGFast.cpp Finish moving TargetRegisterInfo::isVirtualRegister() and friends to llvm::Register as started by r367614. NFC 2019-08-01 23:27:28 +00:00
ScheduleDAGRRList.cpp [ScheduleDAG] When a node is cloned, add an edge between the nodes. 2019-10-04 19:51:40 +00:00
ScheduleDAGSDNodes.cpp Recommit "Add a heap alloc site marker field to the ExtraInfo in MachineInstrs" 2019-10-28 16:59:32 -07:00
ScheduleDAGSDNodes.h Prune Analysis includes from SelectionDAG.h 2019-10-19 01:07:48 +00:00
ScheduleDAGVLIW.cpp Prune Analysis includes from SelectionDAG.h 2019-10-19 01:07:48 +00:00
SDNodeDbgValue.h
SelectionDAG.cpp Fix uninitialized variable warning. NFCI. 2019-11-02 14:42:38 +00:00
SelectionDAGAddressAnalysis.cpp Prune a LegacyDivergenceAnalysis and MachineLoopInfo include each 2019-10-19 01:31:09 +00:00
SelectionDAGBuilder.cpp [IR] Redefine Freeze instruction 2019-11-12 10:49:00 +09:00
SelectionDAGBuilder.h [IR] Redefine Freeze instruction 2019-11-12 10:49:00 +09:00
SelectionDAGDumper.cpp [AArch64][SVE] Add SPLAT_VECTOR ISD Node 2019-10-18 11:48:35 +00:00
SelectionDAGISel.cpp Replace wrongly deleted header banner, fix formatting 2019-11-14 10:21:42 -08:00
SelectionDAGPrinter.cpp
SelectionDAGTargetInfo.cpp
StatepointLowering.cpp [Statepoints] Fix overalignment of loads in no-realign-stack functions 2019-08-02 20:17:37 +00:00
StatepointLowering.h [FastISel] Fix crash for gc.relocate lowring 2019-04-05 05:41:08 +00:00
TargetLowering.cpp [TargetLowering][DAGCombine][MSP430] Shift Amount Threshold in DAGCombine (4) 2019-11-13 09:23:08 +01:00