mirror of
https://github.com/Gericom/teak-llvm.git
synced 2025-06-26 14:58:59 -04:00
1d20a5e9e8
Summary:
Follow the same syntax as for the spec repo. Both have evolved slightly
independently and need to converge again.
This, along with wasmate changes, allows me to do the following:
echo "int add(int a, int b) { return a + b; }" > add.c
./out/bin/clang -O2 -S --target=wasm32-unknown-unknown add.c -o add.wack
./experimental/prototype-wasmate/wasmate.py add.wack > add.wast
./sexpr-wasm-prototype/out/sexpr-wasm add.wast -o add.wasm
./sexpr-wasm-prototype/third_party/v8-native-prototype/v8/v8/out/Release/d8 -e "print(WASM.instantiateModule(readbuffer('add.wasm'), {print:print}).add(42, 1337));"
As you'd expect, the d8 shell prints out the right value.
Reviewers: sunfish
Subscribers: jfb, llvm-commits, dschuff
Differential Revision: http://reviews.llvm.org/D13712
llvm-svn: 250480
331 lines
11 KiB
C++
331 lines
11 KiB
C++
//===-- WebAssemblyAsmPrinter.cpp - WebAssembly LLVM assembly writer ------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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///
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/// \file
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/// \brief This file contains a printer that converts from our internal
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/// representation of machine-dependent LLVM code to the WebAssembly assembly
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/// language.
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///
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//===----------------------------------------------------------------------===//
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#include "WebAssembly.h"
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#include "WebAssemblyMachineFunctionInfo.h"
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#include "WebAssemblyRegisterInfo.h"
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#include "WebAssemblySubtarget.h"
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#include "InstPrinter/WebAssemblyInstPrinter.h"
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#include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
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#include "llvm/ADT/SmallString.h"
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#include "llvm/ADT/StringExtras.h"
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#include "llvm/CodeGen/AsmPrinter.h"
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#include "llvm/CodeGen/MachineConstantPool.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/IR/DataLayout.h"
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#include "llvm/IR/DebugInfo.h"
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#include "llvm/MC/MCStreamer.h"
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#include "llvm/MC/MCSymbol.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/TargetRegistry.h"
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#include "llvm/Support/raw_ostream.h"
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using namespace llvm;
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#define DEBUG_TYPE "asm-printer"
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namespace {
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class WebAssemblyAsmPrinter final : public AsmPrinter {
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const WebAssemblyInstrInfo *TII;
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const MachineRegisterInfo *MRI;
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unsigned NumArgs;
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public:
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WebAssemblyAsmPrinter(TargetMachine &TM, std::unique_ptr<MCStreamer> Streamer)
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: AsmPrinter(TM, std::move(Streamer)), TII(nullptr), MRI(nullptr) {}
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private:
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const char *getPassName() const override {
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return "WebAssembly Assembly Printer";
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}
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//===------------------------------------------------------------------===//
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// MachineFunctionPass Implementation.
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//===------------------------------------------------------------------===//
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void getAnalysisUsage(AnalysisUsage &AU) const override {
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AsmPrinter::getAnalysisUsage(AU);
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}
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bool runOnMachineFunction(MachineFunction &MF) override {
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const auto &Subtarget = MF.getSubtarget<WebAssemblySubtarget>();
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TII = Subtarget.getInstrInfo();
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MRI = &MF.getRegInfo();
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NumArgs = MF.getInfo<WebAssemblyFunctionInfo>()->getNumArguments();
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return AsmPrinter::runOnMachineFunction(MF);
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}
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//===------------------------------------------------------------------===//
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// AsmPrinter Implementation.
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//===------------------------------------------------------------------===//
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void EmitJumpTableInfo() override;
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void EmitConstantPool() override;
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void EmitFunctionBodyStart() override;
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void EmitInstruction(const MachineInstr *MI) override;
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std::string getRegTypeName(unsigned RegNo) const;
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static std::string toString(const APFloat &APF);
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const char *toString(Type *Ty) const;
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std::string regToString(const MachineOperand &MO);
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std::string argToString(const MachineOperand &MO);
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};
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} // end anonymous namespace
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//===----------------------------------------------------------------------===//
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// Helpers.
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//===----------------------------------------------------------------------===//
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// Operand type (if any), followed by the lower-case version of the opcode's
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// name matching the names WebAssembly opcodes are expected to have. The
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// tablegen names are uppercase and suffixed with their type (after an
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// underscore).
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static std::string OpcodeName(const WebAssemblyInstrInfo *TII,
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const MachineInstr *MI) {
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std::string N(StringRef(TII->getName(MI->getOpcode())).lower());
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std::string::size_type Len = N.length();
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std::string::size_type Under = N.rfind('_');
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bool HasType = std::string::npos != Under;
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std::string::size_type NameEnd = HasType ? Under : Len;
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std::string Name(&N[0], &N[NameEnd]);
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return HasType ? (std::string(&N[NameEnd + 1], &N[Len]) + '.' + Name) : Name;
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}
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static std::string toSymbol(StringRef S) { return ("$" + S).str(); }
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std::string WebAssemblyAsmPrinter::getRegTypeName(unsigned RegNo) const {
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const TargetRegisterClass *TRC = MRI->getRegClass(RegNo);
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for (MVT T : {MVT::i32, MVT::i64, MVT::f32, MVT::f64})
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if (TRC->hasType(T))
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return EVT(T).getEVTString();
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DEBUG(errs() << "Unknown type for register number: " << RegNo);
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llvm_unreachable("Unknown register type");
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return "?";
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}
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std::string WebAssemblyAsmPrinter::toString(const APFloat &FP) {
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static const size_t BufBytes = 128;
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char buf[BufBytes];
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if (FP.isNaN())
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assert((FP.bitwiseIsEqual(APFloat::getQNaN(FP.getSemantics())) ||
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FP.bitwiseIsEqual(
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APFloat::getQNaN(FP.getSemantics(), /*Negative=*/true))) &&
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"convertToHexString handles neither SNaN nor NaN payloads");
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// Use C99's hexadecimal floating-point representation.
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auto Written = FP.convertToHexString(
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buf, /*hexDigits=*/0, /*upperCase=*/false, APFloat::rmNearestTiesToEven);
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(void)Written;
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assert(Written != 0);
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assert(Written < BufBytes);
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return buf;
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}
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std::string WebAssemblyAsmPrinter::regToString(const MachineOperand &MO) {
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unsigned RegNo = MO.getReg();
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if (TargetRegisterInfo::isPhysicalRegister(RegNo))
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return WebAssemblyInstPrinter::getRegisterName(RegNo);
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// WebAssembly arguments and local variables are in the same index space, and
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// there are no explicit varargs, so we just add the number of arguments to
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// the virtual register number to get the local variable number.
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return utostr(TargetRegisterInfo::virtReg2Index(RegNo) + NumArgs);
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}
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std::string WebAssemblyAsmPrinter::argToString(const MachineOperand &MO) {
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unsigned ArgNo = MO.getImm();
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// Same as above, but we don't need to add NumArgs here.
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return utostr(ArgNo);
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}
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const char *WebAssemblyAsmPrinter::toString(Type *Ty) const {
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switch (Ty->getTypeID()) {
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default:
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break;
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// Treat all pointers as the underlying integer into linear memory.
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case Type::PointerTyID:
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switch (getPointerSize()) {
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case 4:
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return "i32";
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case 8:
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return "i64";
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default:
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llvm_unreachable("unsupported pointer size");
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}
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break;
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case Type::FloatTyID:
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return "f32";
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case Type::DoubleTyID:
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return "f64";
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case Type::IntegerTyID:
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switch (Ty->getIntegerBitWidth()) {
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case 8:
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return "i8";
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case 16:
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return "i16";
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case 32:
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return "i32";
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case 64:
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return "i64";
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default:
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break;
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}
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}
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DEBUG(dbgs() << "Invalid type "; Ty->print(dbgs()); dbgs() << '\n');
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llvm_unreachable("invalid type");
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return "<invalid>";
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}
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//===----------------------------------------------------------------------===//
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// WebAssemblyAsmPrinter Implementation.
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//===----------------------------------------------------------------------===//
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void WebAssemblyAsmPrinter::EmitConstantPool() {
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assert(MF->getConstantPool()->getConstants().empty() &&
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"WebAssembly disables constant pools");
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}
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void WebAssemblyAsmPrinter::EmitJumpTableInfo() {
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// Nothing to do; jump tables are incorporated into the instruction stream.
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}
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void WebAssemblyAsmPrinter::EmitFunctionBodyStart() {
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const Function *F = MF->getFunction();
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Type *Rt = F->getReturnType();
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SmallString<128> Str;
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raw_svector_ostream OS(Str);
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bool First = true;
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if (!Rt->isVoidTy() || !F->arg_empty()) {
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for (const Argument &A : F->args()) {
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OS << (First ? "" : "\n") << "\t.param " << toString(A.getType());
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First = false;
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}
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if (!Rt->isVoidTy()) {
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OS << (First ? "" : "\n") << "\t.result " << toString(Rt);
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First = false;
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}
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}
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bool FirstVReg = true;
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for (unsigned Idx = 0, IdxE = MRI->getNumVirtRegs(); Idx != IdxE; ++Idx) {
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unsigned VReg = TargetRegisterInfo::index2VirtReg(Idx);
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if (!MRI->use_empty(VReg)) {
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if (FirstVReg) {
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OS << (First ? "" : "\n") << "\t.local ";
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First = false;
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}
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OS << (FirstVReg ? "" : ", ") << getRegTypeName(VReg);
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FirstVReg = false;
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}
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}
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if (!First)
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OutStreamer->EmitRawText(OS.str());
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AsmPrinter::EmitFunctionBodyStart();
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}
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void WebAssemblyAsmPrinter::EmitInstruction(const MachineInstr *MI) {
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DEBUG(dbgs() << "EmitInstruction: " << *MI << '\n');
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SmallString<128> Str;
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raw_svector_ostream OS(Str);
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unsigned NumDefs = MI->getDesc().getNumDefs();
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assert(NumDefs <= 1 &&
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"Instructions with multiple result values not implemented");
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OS << '\t';
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switch (MI->getOpcode()) {
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case TargetOpcode::COPY:
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OS << "get_local " << regToString(MI->getOperand(1));
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break;
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case WebAssembly::GLOBAL:
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// TODO: wasm64
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OS << "i32.const " << toSymbol(MI->getOperand(1).getGlobal()->getName());
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break;
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case WebAssembly::ARGUMENT_I32:
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case WebAssembly::ARGUMENT_I64:
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case WebAssembly::ARGUMENT_F32:
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case WebAssembly::ARGUMENT_F64:
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OS << "get_local " << argToString(MI->getOperand(1));
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break;
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case WebAssembly::Immediate_I32:
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OS << "i32.const " << MI->getOperand(1).getImm();
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break;
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case WebAssembly::Immediate_I64:
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OS << "i64.const " << MI->getOperand(1).getImm();
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break;
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case WebAssembly::Immediate_F32:
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OS << "f32.const " << toString(MI->getOperand(1).getFPImm()->getValueAPF());
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break;
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case WebAssembly::Immediate_F64:
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OS << "f64.const " << toString(MI->getOperand(1).getFPImm()->getValueAPF());
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break;
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default: {
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OS << OpcodeName(TII, MI);
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bool NeedComma = false;
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for (const MachineOperand &MO : MI->uses()) {
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if (MO.isReg() && MO.isImplicit())
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continue;
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if (NeedComma)
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OS << ',';
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NeedComma = true;
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OS << ' ';
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switch (MO.getType()) {
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default:
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llvm_unreachable("unexpected machine operand type");
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case MachineOperand::MO_Register:
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OS << "(get_local " << regToString(MO) << ')';
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break;
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case MachineOperand::MO_Immediate:
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OS << MO.getImm();
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break;
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case MachineOperand::MO_FPImmediate:
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OS << toString(MO.getFPImm()->getValueAPF());
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break;
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case MachineOperand::MO_GlobalAddress:
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OS << toSymbol(MO.getGlobal()->getName());
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break;
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case MachineOperand::MO_MachineBasicBlock:
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OS << toSymbol(MO.getMBB()->getSymbol()->getName());
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break;
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}
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}
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break;
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}
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}
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OutStreamer->EmitRawText(OS.str());
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if (NumDefs != 0) {
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SmallString<128> Str;
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raw_svector_ostream OS(Str);
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const MachineOperand &Operand = MI->getOperand(0);
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OS << "\tset_local " << regToString(Operand) << ", pop";
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OutStreamer->EmitRawText(OS.str());
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}
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}
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// Force static initialization.
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extern "C" void LLVMInitializeWebAssemblyAsmPrinter() {
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RegisterAsmPrinter<WebAssemblyAsmPrinter> X(TheWebAssemblyTarget32);
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RegisterAsmPrinter<WebAssemblyAsmPrinter> Y(TheWebAssemblyTarget64);
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}
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